18 results on '"Chun Yao Wang"'
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2. LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach.
3. A Don't-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks.
4. Majority Logic Circuit Minimization Using Node Addition and Removal.
5. Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization.
6. A New Necessary Condition for Threshold Function Identification.
7. LOOPLock: Logic Optimization-Based Cyclic Logic Locking.
8. Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.
9. Correctness Analysis and Power Optimization for Probabilistic Boolean Circuits.
10. Verification of Reconfigurable Binary Decision Diagram-Based Single-Electron Transistor Arrays.
11. Logic Restructuring Using Node Addition and Removal.
12. Fast Node Merging With Don't Cares Using Logic Implications.
13. Dependent-Latch Identification in Reachable State Space.
14. An Implicit Approach to Minimizing Range-Equivalent Circuits.
15. A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design.
16. Automatic interconnection rectification for SoC design verification based on the port order fault model.
17. On automatic-verification pattern generation for SoC withport-order fault model.
18. An automorphic approach to verification pattern generation for SoC design verification using port-order fault model.
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