Search

An ultra-low-power fully dynamic capacitance-to-digital converter (CDC) that exploits a novel charge reuse technique is proposed. The CDC includes a capacitive bridge as the sensing frontend and an asynchronous successive approximation register ADC for signal digitization. Passive charge sharing between the frontend and ADC is used to enable a fully dynamic operation. Instead of resetting the capacitive bridge (with large sensing and reference capacitors) for each measurement, the charge is maintained and reused over many measurements to save energy. A power-gating technique is employed to reduce the stand-by power. As a result, a figure of merit as low as 4.3 fJ/conv-step is achieved for the CDC, which is $> 3\times $ better than the state of the art. Furthermore, it supports an inherent scaling of power versus speed with a minimum power of only 44 pW and a compact chip area of $6440~\mu \text{m}^{2}$ .

We present a 5-sensor, fully integrated sensing system with interchangeable sensors and programmable configuration to create a sub-microWatt multisensor node that can tackle a wide range of sensing applications. Furthermore, the sensor node is capable of autonomously adapting its configuration to the application requirements hence minimizing system power. Such self-reconfiguration is enabled at low overhead by developing an automated offline optimization strategy, in combination with an autonomous embedded configuration controller, using the concept of behavioral trees (BTs). The resulting fully integrated platform consumes a maximum of 321 nW when sampling at 500 Hz and 3025 nW at 8 kHz. Furthermore, we demonstrate the end-to-end autonomous optimization flow for two different applications exploiting different sensors: 1) human activity recognition using accelerometers and 2) machine listening using a microphone. Both use cases demonstrate that the introduced system and methodology reduces the power by more than a factor 2 without losing significant application detection accuracy.

This letter presents the design and experimental characterization of an ultrasound rangefinder system. A new distance measurement method is proposed for determining the relative position among sensor nodes that are operated in a collision and multipath rich environment, while needing no common time reference between them. A 65 nm CMOS technology has been used to build the sensor nodes, which comprise an on-chip receiver and transmitter. The proposed rangefinder system is characterized up to 1 m in air and has a range resolution of 6.5 mm, while dissipating $2.67~\mu {\mathrm{ J}}$ per measurement.

This letter describes a miniature, ultra low power, all-dynamic temperature sensor based on a duty-cycled resistive transducer bridge and a 9-bit asynchronous SAR ADC in 65-nm CMOS. It features a novel floating bridge technique and automatic power gating to achieve the lowest reported power consumption. It consumes 2.18 pJ per conversion and has an RMS resolution of 0.53 K, leading to an FoM of 0.61 pJ $\cdot \text{K}^{2}$ . A standby power of 52 pW allows a high power-efficiency, even at low sample rates. It occupies $36\times 46\,\,\mu \text{m}$ of chip area and has a sensing range from −20 °C to 120 °C.

A versatile resistive temperature sensor for Internet-of-Things is presented, based on an all-dynamic architecture. This allows efficient scaling of power with conversion rate, enables optional oversampling for an adaptable resolution, and provides efficient adaptability to different resistor values. A new double-sided measurement mode is proposed to compensate for offset, 1/f noise and nonidealities at system level. The sensor achieves a minimum power consumption of 174 pW at 1 S/s measurement rate, which scales up to 488.3 nW at 100 kS/s. It offers a nominal rms resolution of 0.61 °C and a resolution FoM as low as 1.82 pJ·°C2. ispartof: IEEE solid-state circuit letters vol:1 issue:3 pages:70-74 status: published