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This letter presents an ultrabroadband power amplifier (PA) with AM–phase modulation (PM) linearizer in a 28-nm bulk CMOS process for 5G millimeter-wave (mm-Wave) mobile communications. To enable the 5G mm-Wave multigigahertz broadband, a pMOS linearizer in power stage is introduced to achieve broadband AM–PM linearization. The proposed linearized PA achieves a 3-dB gain bandwidth (BW) from 19.7 to 38.9 GHz (65.5%) covering multiple 5G bands. The measured OP1 dB is 12.7 dB ± 0.6 dB from 22 to 38 GHz, and the PAE is larger than 25% from 21 to 36 GHz (50%). For 100-MHz 64-quadratic-amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM) signal, this PA obtains a linear output power of 8.5 dBm/8.3 dBm/8.8 dBm under error vector magnitude (EVM) of −25 dB with modulated PAE of 11.0%/11.0%/11.9% at 23 GHz/28 GHz/38 GHz, respectively. Moreover, the measured back-off power from OP1 dB to linear output power is 4.7 dB/3.9 dB/3.7 dB at 23 GHz/28 GHz/38 GHz. [ABSTRACT FROM AUTHOR]

A 27–44 GHz subharmonic up-conversion mixer using 65 nm CMOS technology is presented. For subharmonic scheme and wide RF/IF bandwidth, a dual-ring topology is developed in this mixer design. To increase the linearity and conversion gain (CG) without adding additional local oscillator (LO) power, a LO boosting linearization technique is adopted. The subharmonic up-conversion mixer achieves a measured CG of −12 dB ± 1.5 dB from a wide RF frequency of 27 to 44 GHz. The 3-dB IF bandwidth is from dc to 10 GHz. After adopting the linearization technique, the output 1-dB compression point (OP1 dB) of the subharmonic up-conversion mixer can be improved from −12 to −9 dBm at 38 GHz with zero addition dc consumption. [ABSTRACT FROM AUTHOR]

In this letter, we propose an ultralow-power transformer-based V-band receiver front-end using a 65-nm CMOS technology. Forward-body-bias and transformer-based positive-feedback topologies are utilized to enable its operation at a low drain bias of 0.3 V, while still ensuring its gain performance. A resistive ring mixer, with its advantage of zero-dc-power consumption, serves as the frequency down-converter of the system. The proposed receiver front-end demonstrates an 8.5-dB conversion gain and possesses the power-saving ability to use only 0.7 mW of dc-power consumption. [ABSTRACT FROM AUTHOR]

A 40-GHz variable gain amplifier (VGA) with 4-bit digital gain control and low phase variation is designed and fabricated on the 65-nm CMOS process. The digital gain control mechanism is achieved using the presented digital version current steering topology. The measured gain of the VGA is between 22 and 6 dB at 40 GHz with 16 different linear-in-decibel gain states. Using the proposed two-stage digital version current steering VGA phase compensation technique, the measured phase variation is 3.18° within a 16-dB gain control range (GCR) and the root mean square (rms) phase error is 0.89° at 40 GHz. [ABSTRACT FROM AUTHOR]

An ${{X}}$ -band fully integrated power amplifier (PA) has been designed and fabricated on CMOS technology. Utilizing a transformer-based folded radial power splitter and binary power combiner network, the CMOS PA delivers 29.6 dBm saturation power (${{P}}_{\mathbf {sat}}$) at 11 GHz. The measured gain is 11.2 dB, the output of 1-dB compression point (${{OP}}_{\mathbf {1\,dB}}$) is 28.2 dBm, and the peak power-added efficiency (PAE) is 15.5% at 11 GHz. To our knowledge, the PA achieves the highest ${{P}}_{\mathbf {sat}}$ and the highest ${{OP}}_{\mathbf {1\,dB}}$ among other reported CMOS PAs around ${{X}}$ -band to date. [ABSTRACT FROM AUTHOR]

A radial multiway power divider is used to distribute microwave signals to the next stages located radially around all directions. It has been a challenging task to implement a radial multiway power divider on a planar circuit board without sacrificing the bandwidth performance. In this letter, a radial four-way power divider with the proposed isolation network is presented. The isolation network, composed of several combined RLC and LC networks, plays the crucial role of making the radial layout style easy to realize, and meanwhile improves the output matching and port-to-port isolation. The background principle of the proposed topology and the guideline of designing the isolation network are provided. The fabricated radial four-way power divider results in the measured −20-dB output matching and isolation bandwidths as large as 35% and 65%, respectively, exhibiting the best bandwidth performance among all the published radial power dividers of the same type. [ABSTRACT FROM PUBLISHER]

An X -band half-watt fully integrated power amplifier (PA) using standard 0.18- \mu \text{m} 1P6M CMOS technology is presented in this letter. Utilizing an interweaved three-primary parallel combining transformer, the CMOS PA delivers 27.1 dBm of measured saturation output power ( P_{\mathbf {sat}}$ ) with 22.7% of power-added efficiency at 9 GHz from a 3.3-V power supply. The measured output 1-dB gain compression point (OP1 dB) is 24.2 dBm and the gain performance is 11.2 dB at 9 GHz. The chip size is $1.045 \times 0.84$ mm $^{{\mathbf {2}}}$ . To the best of our knowledge, the PA is the first half-watt CMOS PA with excellent power density at the $X$ -band. [ABSTRACT FROM PUBLISHER]

In this letter, the bowtie-radial and balanced dual-radial PA architectures are proposed to combine 4-way and 8-way power units. Moreover, they also make breakthrough on the power area density (PAD) performances of N-way combined PAs. These two CMOS PAs can both achieve the highest output power of 26.1 dBm at 23.5 GHz with PAD of 635 mW/mm^2 and 23 dBm at 60 GHz with PAD of 277 mW/mm^2, respectively. [ABSTRACT FROM PUBLISHER]

An ultra-low-power transformer-based K-band receiver front-end is implemented in a 65 nm CMOS technology. For noise and input matching, a gate-to-source transformer-feedback technique is applied to the first-stage of the LNA. A transformer-based gain-boosting feedback technique is adopted in the second-stage of the LNA for further gain enhancement without additional dc power. Several transformers are utilized for inter-stage matching of the LNA and for single-to-differential LO/RF baluns of the ring mixer. By using forward-body-bias technique, the LNA operates at 0.33 V supply. For low-power receiver, a resistive ring mixer is adopted. The receiver demonstrates a 12.5 dB conversion gain (CG) and a 5.7 dB double-side band NF at IF frequency of 100 MHz with LO power of -10 dBm while consuming only 683 \muW. To the best of our knowledge, the receiver demonstrates the lowest dc power consumption among recently reported K-band CMOS receiver. [ABSTRACT FROM PUBLISHER]

A digital-calibrated isolator for radar is proposed to improve transmitter-to-receiver isolation in this letter. The proposed isolator consists of feedforward and digital-calibrated circuits to cancel the transmitter-to-receiver leakage power. The proposed isolator is implemented in 0.18-\mum CMOS technology which shows 27.3 dB isolation while consuming 13.5 mW dc power. The OP1\,dB of the transmitter-to-antenna is better than +13.5 dBm. [ABSTRACT FROM PUBLISHER]

A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power amplifier (PA) achieves a P sat of 10.72 dBm and OP 1~dB of 7.3 dBm from 1.2 V supply. After linearization, the OP1~dB has been doubled from 7.3 to 10.2 dBm and the operating PAE at OP1~dB consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB. [ABSTRACT FROM PUBLISHER]