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Introducing bond wire diagnosis for multichip IGBT modules is key to the health monitoring of modular multilevel converters (MMCs), which allows for improved field robustness, reliability, and reduced maintenance cost. This paper leverages the crosstalk phenomenon during switching transitions to detect the chip open-circuit faults caused by the bond wire lift-off using typical half-bridge IGBT modules in a multichip-parallel configuration. The cycle-controlled, non-intrusive measurement is conducted under normal operation, when the device under test is at off-state and its complementary switch is during switching transitions. Two specialized health sensitive parameters arising from the dynamic gate loop waveforms are identified and evaluated, including 1) the gate voltage VGE(t3) when the declining collector voltage reaches zero, and 2) the negative peak gate voltage VGE(t4). The sensitivity and stability of these two parameters are compared through theoretical analysis, circuit simulation and practical verification. The results show that VGE(t4) is more suitable for online monitoring, while VGE(t3) is more sensitive than VGE(t4). With managed complexity in gate drives, this proposed health awareness approach is feasible in the submodules of MMC applications, but it can also be used in other power converter topologies incorporating the half-bridge structure.

In the literature, giant magnetoresistive (GMR) point field detectors (PFDs) were integrated in terminals of Si IGBT modules for galvanically isolated current sensing in machine drives. This work presents a PFD-based current sensing system that can be fully integrated in the direct bonded copper (DBC) region of SiC power modules. The physics of phase shift errors caused by the Nickel (Ni) plating in the SiC power module is investigated. To address current sensing phase errors, a real-time phase shift reduction method is proposed. A bandwidth extension method is proposed to meet the sensing requirement of SiC devices that can switch at tens of kilohertz. The phase shift reduction and bandwidth extension methods are experimentally combined to sense the currents in the SiC DBC regions. The proposed current sensing has high bandwidth, minimal phase errors and low position sensitivity. The sensed currents can be used for high performance control and protection of SiC module-based converters.

In pursuit of high power density and high reliability of power converters, the junction temperature of power devices becomes an essential indicator for heath condition monitoring and thermal management. Particularly under high-temperature operating conditions, the temperature-dependent thermal properties of the chip and ceramic materials must be incorporated to enhance the prediction accuracy. In this paper, an improved temperature-dependent Cauer-type thermal network of IGBT module is established. The temperature dependence of thermal parameters for the chip layer and ceramic layer are meticulously considered. More importantly, FEM simulation is used to yield the heat flux curve of the power module at the center line in order to better imitate the real heat-spreading scenario. This way, the effective heat transfer area of each layer can be calculated accurately and analytically. By this analytic method, the temperature-dependent thermal impedance can be efficiently determined. Compared with prior-art fully FEM-based temperature-dependent thermal impedance characterization method, the method proposed in this paper reduces the FEM simulation time cost approximately 20 times under the same computing hardware facilities and considerably simplifies the parameter extraction process. Finally, experimental results based on two commercial IGBT modules successfully validate the usefulness, effectiveness and accuracy of the proposed thermal network model.

SiC MOSFET has superior switching performance over Si IGBT in terms of power loss and temperature characteristics. In order to significantly improve the efficiency and power density of medium voltage drive and high-power converters, this paper proposes a current source gate driver for series connected SiC MOSFETs, forming a universal block of series connected SiC devices with higher voltage rating. Proposed current source gate driver has better gate voltage synchronization performance because of its constant gate current and novel gate driver structure. By implementing synchronized gate voltages, the snubber circuit is designed only for power loop difference, gate displacement current difference, and the snubber can be minimized or even be eliminated. The proposed block has been verified by LTSPICE simulations and multi-pulse test experiments under 200kHz, 2kV, 0~60A condition using three 1.2kV/60A C2M0040120D SiC MOSFETs connected in series.

Transformerless inverters are being used for integrating photovoltaic (PV) sources to the grid. Highly efficient and reliable inverter concept (HERIC) inverter is one such topology which is derived from H-bridge by adding a bypass leg on the AC side using two back-to-back insulated gate bipolar transistors (IGBT). Open-circuit fault in the bypass leg would result in conduction of current through anti-parallel diodes of the main switches of the inverter, effectively making the inverter to operate in bipolar mode. As a result of the fault, there would not be an issue of leakage current and the operation would continue at the expense of increased conduction losses and dc-offset in the grid current. This paper proposes an online non-invasive model-based technique to detect switch faults in the bypass leg of the HERIC inverter. The grid current at the peak of the carrier signal is predicted based on the measured grid current at the start of the zero state. By comparing the estimated and measured grid currents at the peak of the carrier signal, faulty switch in the bypass leg is localized. Once the fault is localized, the inverter’s modulation scheme is changed to conventional bipolar mode to improve the performance of the converter during the post-fault stage. A detailed simulation study is carried out to verify the effectiveness of the proposed approach. Experimental tests on the prototype converter show that the proposed algorithm can reliably detect open-circuit fault in switches of the bypass leg and once a fault is detected, the algorithm would change the modulation scheme to bipolar mode to minimize the inverter loss and dc-offset in the grid current.

Connecting low-voltage insulated gate bipolar transistor (IGBT) in series to withstand much higher dc -link voltages has some advantages over using a single high-voltage IGBT or the multilevel topologies. However, severe voltage imbalance during turn-off transient remains to be solved. In all existing methods, adjusting driving signal time delay (ADSTD) is attractive and has no penalty of sacrificing the switching performance of IGBT. Moreover, instead of using a snubber, the voltage imbalance caused by the difference in tail currents can be mitigated by using ADSTD as well. An active voltage balance method based on ADSTD is proposed and verified by experiments in this article. Besides, a more accurate equivalent capacitance for IGBT considering the stored carriers in the n-drift region is discussed. The factors affecting a proper driving signal time delay are also discussed in detail. These contents are well supported by experimental results as well.

A press pack insulated gate bipolar transistor (PP IGBT) device consists of multiple materials. Under the influence of alternating current and clamping force, the device suffers from complex thermomechanical stress. However, the experience-based packaging design does not consider the coupling effect of junction temperature fluctuation ( $\Delta T_{\mathrm{ j}}$ ) and mechanical stress, which may not ensure the optimal thermomechanical behavior and cause the advance failure of the PP IGBT device. Thus, it is significant to provide a theoretical basis and select appropriate parameters for device packaging design. In this article, a finite-element model of a 3300-V/50-A PP IGBT device is first built and verified via experiments. The influence of principal parameters on the thermomechanical behavior is then illustrated. Next, the response surface method is proposed to reveal the significance level of each parameter. According to simulation results under different combinations of parameters, quadratic response surfaces are obtained. The combined effects of packaging parameters on $\Delta T_{\mathrm{ j}}$ and stress are clarified. Finally, optimal results are derived and verified. An approximate 4 °C decrease in $\Delta T_{\mathrm{ j}}$ and a 19.8% decrease in stress are achieved simultaneously in the long-time power cycling test. A 2.6 °C reduction in junction temperature is achieved under the practical high-voltage direct current (HVDC) condition.

The safe operating condition for the vacuum tubes is very important and critical since they are very expensive and delicate. Providing limited short circuit energy for the vacuum tube and fast transferring from the short circuit to the nominal operation state are absolutely necessary. Extant protection strategies threat the availability of the vacuum tubes. In addition, they cannot completely protect the tube due to the delay of the fault detection system. This article proposes a high voltage (HV) short circuit fault current limiter which can limit the short circuit energy of the system inherently. The proposed structure activates automatically when the current exceeds the predetermined value. Hence, the need for the fault detection unit is minimized. The proposed short circuit fault current limiter is based on the series insulated gate bipolar transistors (IGBTs). Due to the interesting current limiting feature of the IGBTs, the short circuit current is limited for a definite time. During this time interval, the vacuum arc interrupts and the tube can operate instantaneously. In order to provide a safe operating condition of the series-connected IGBTs in the short circuit fault, several external circuits are suggested. The proper operation of the proposed short circuit fault current limiter is evaluated using simulations and experimental prototyping.

Temperature sensitive electrical parameters (TSEPs) are used to determine the chip temperature of a single-chip insulated gate bipolar transistors (IGBT) power module by measuring one electrical device parameter. Commonly, most TSEPs have a linear relationship between the chip temperature and the electrical parameter. Like any sensor, preferred attributes of TSEPs include good accuracy, linearity, and sensitivity. For multichip IGBTs (mIGBTs) modules, these can only be achieved when all chips have the same temperature. Equal chip temperatures among different semiconductor chips can be achieved when placing mIGBTs in environmental chambers to produce a homogeneous temperature distribution (HTD). In real applications, however, mIGBTs are power cycled and are exposed to inhomogeneous temperature distribution (ITD) where temperature differences exist between chips. Consequently, measuring one electric parameter only cannot represent each chip temperature which impacts the TSEP sensitivity, linearity, and accuracy. This article compares the performance of ten TSEPs applied to an mIGBT module operating at HTD and ITD conditions in order to determine which TSEPs are most suitable for mIGBTs in real applications.

Insulated gate bipolar transistor (IGBT) modules are the most critical components of modular multilevel converters (MMCs). However, they are subjected to repetitive thermo-mechanical stress caused by thermal cycles on different materials, which can easily lead to failures in the solder layers. Moreover, when MMCs work at high power factor, the IGBT modules have severely uneven temperature distribution due to the inherent dc-bias in arm currents. Some chips are much hotter than others. These hot spots significantly reduce the lifetime of the whole module. This article proposes an optimized and low-cost air-cooling system dedicated to the application of MMC. Uniquely designed O-shaped heat pipes are embedded on the heatsink to add another thermal path without extra fans and fins. The unique shape and layout of heat pipes can minimize the hot spots temperature. The operating principle and power loss of MMC are analyzed first. Then, 3-D finite element (FE) simulation is performed in ANSYS 19.2. Nine modified air-cooling heatsinks with embedded heat pipes are proposed and compared. Finally, the optimal one and a conventional air-cooling heatsink are fabricated for experimental evaluation. The comparative experiment results show that the optimized cooling system is superior over the conventional one by 20% lower in the hot spot temperature.

Electric field and temperature are two of the most important factors affecting the reliability of IGBT devices. However, the actual effects of coupled electrical–thermal stress on the reliability of these devices have not been studied in detail. In this article, cross-experiments combining different types of reliability experiments, such as high-temperature gate bias, high-temperature storage stressing, and power cycling (PC), are carried out to study the degradation mechanisms in the IGBT devices under coupled electrical–thermal stress. The process of cross-experiments is discussed in detail and a large number of IGBT devices are used for experimental verification. The degradation parameters are monitored and the related mechanisms are discussed for two parts: chip and packaging. Based on the experimental results, a detailed trap formation hypothesis about gate leakage current is proposed. At last, it is qualitatively verified via a finite element model that high-temperature storage helps to release residual stress in bonding wires, and the influence of gate oxide degradation in the PC experiments is explained.

Press pack insulated gate bipolar transistor (PP IGBT) is suitable for the hybrid high voltage direct current (HVdc) breaker to clear the fault current of the flexible HVdc transmission system with its advantages of double-side cooling, short-circuit failure mode, and easy to connect in series. However, it should have the ability to transmit the fault current, which is up to five or six times of its rated current, within several milliseconds depending on the distances between two stations without external cooling system. The junction temperature of PP IGBT will increase sharply and it is not possible to be measured during that situation. Therefore, the accurate prediction of junction temperature is extremely important for the packaging design of PP IGBT according to its working condition. In this article, an electro-thermo-mechanical multiphysics field-circuit coupling model of PP IGBT, which is coupled with the electrical, thermal, and mechanical fields, is proposed to predict the collector current, clamping force, and junction temperature. The 3-D mechanical model is decoupled with the 1-D electro-thermal Cauer network model to simplify this multiphysics model without reducing its accuracy. Both the normal and worst working conditions are analyzed through this multiphysics field-circuit model.

In this article, the influence of gate loop inductance on the insulated-gate bipolar transistor (IGBT) junction temperature monitoring based on the transient peak gate current temperature-sensitive electrical parameter (TSEP) methods is investigated using the time-domain analysis, SPICE simulation, and experimental work. It is observed that the peak gate current decreases considerably with increasing gate loop inductance, which was not addressed by a previous work. An improved junction temperature estimation model is developed to address this issue and is experimentally validated over a wide range of gate loop inductances. Unlike the previously reported model calibrated for a fixed gate loop inductance, the new model can provide accurate junction temperature monitoring in any power converter based on the same IGBT with a wide range of gate loop inductance values. An error of less than 6.2 °C in IGBT junction temperature estimation is demonstrated even when the gate loop inductance varies by 247%.

Although multichip systems (MCS) are the standard solution for high-power converters, uneven losses and thermal distribution affect unequal lifetime consumption. Many solutions have been proposed to mitigate these effects; however, critical thermal deviations are still observed, leading to a reduction of the overall MCS reliability. Therefore, this work proposes a selective soft-switching (SS) approach, whereby the turn-off losses of the devices are manipulated to obtain thermal balancing and increase the reliability of MCSs. As a consequence, the high current per device reduces its turn-off time, thereby slightly increasing the MCS efficiency. In addition, a pretuning-based thermal balancing approach is presented, whereby the junction temperature ( $T_{j}$ ) of the devices are sensed via collector-emitter voltage ( $V_{\mathrm{\scriptscriptstyle CE}}$ ) only under reduced current conditions. To validate the proposed solutions, finite-elements modelling (FEM)-based simulation and experimental tests are conducted. Moreover, a case study demonstrates the capability of the selective SS to increase the reliability and reduce the energy consumption of MCS.

The information of junction temperature is crucial for the operational management of insulated-gate bipolar transistor (IGBT) modules. In practice, the junction temperature is typically estimated by using an electrothermal model. IGBT modules are subject to various aging processes during operation, some of which, e.g., substrate solder crack, change the thermal impedance of the IGBT module. However, few works in the literature have included the aging effect on the online thermal behavior modeling of IGBT modules. This article proposes an effective heat propagation path (EHPP)-based real-time adaptive thermal model for IGBT modules, where the EHPP is proposed to quantify the impact of substrate solder cracks on the heat propagation inside the IGBT modules. A straightforward relationship between substrate solder crack and the degree of nonuniformity of case temperature distribution is established. This relationship is then used to approximate the EHPP of the IGBT module in different substrate solder health conditions in real time using the measured nonuniformity of case temperature distribution. Based on the change of the EHPP, the parameters of a thermal equivalent circuit (TEC) model, e.g., an improved Cauer-type TEC, are adjusted online and in real time to track the thermal behavior changes of the IGBT modules caused by substrate solder cracks, leading to a real-time substrate-solder-aging-adaptive thermal model. The proposed real-time adaptive thermal model is validated by simulation studies and experimental tests for a commercial IGBT module.

Junction temperature is a key parameter for the safe operation of power semiconductor devices in power electronic systems. However, it is difficult to forecast the accurate thermal stress of the device in field use. Consequently, engineers tend to use higher rated devices to maintain excessive margin, resulting in a higher cost. In this article, a transient 3-D thermal modeling method for insulated gate bipolar transistor (IGBT) modules is proposed to obtain accurate temperature distribution considering uneven power losses and cooling conditions. The analytical model of uneven switching energy losses among the parallel IGBT chips in modules is built according to the analysis of device simulation results. The effect of uneven cooling conditions on temperature distribution in IGBT modules is considered by thermal-fluid cosimulation. Furthermore, a hybrid simulation strategy is proposed to obtain the transient thermal behavior in three dimensions. Through appropriate interface design, the power loss model is connected with the finite element model to achieve field-circuit cosimulation with multiple time steps, which takes full consideration of the multiphysical coupling effects among power loss, temperature, and flow fields. Finally, the thermal stresses of IGBT modules under different operating conditions are forecast by the proposed method.

This article presents a capacitor-switching semi-full-bridge (CS-SFB) submodule (SM) using Si-IGBT and SiC-MOSFET for a modular multilevel converter (MMC). Compared with the conventional hybrid half-/full-bridge MMC, the CS-SFB MMC has the same dc fault ride-through capability and lower power losses. The conduction loss reduces due to the current sharing phenomenon between Si-IGBTs and SiC-MOSFETs. The switching loss reduces in virtue of the fast recovery characteristic of SiC-diode. The derivation process and working principle of the proposed SM are first introduced. Then, the power loss models are established in the switch, SM, and MMC system levels, respectively. Afterward, the piecewise calculation and simulation results reveal the low-power-loss characteristics of the proposed SM and MMC. Finally, these features are verified by experimental results acquired from a downscaled MMC prototype with Si-IGBTs and SiC-MOSFETs.

In this article, pressureless sintering of nanosilver paste is proposed to enhance the reliability of wire-bonds with SiC chips by both alleviating thermomechanical stresses and enhancing thermal coupling of bonding wires and chips. A multichip 1200-V/300-A SiC hybrid module with six Si IGBTs and 12 SiC Schottky barrier diodes (SBDs) is demonstrated. The lifetime of the wire-bonds with the SiC SBD bonded by the pressureless sintered nanosilver is ~27.9% longer than that by the high-temperature solder under power cycling with constant temperature swing. The lifetime of the wire-bonds with the IGBT also bonded by the pressureless sintered nanosilver is ~46.2% longer than that by the high-temperature solder under power cycling with constant conduction current. Furthermore, not only the cost of 1700-V SiC SBDs is quite similar to that of 1200-V ones but also the leakage current of the 1200-V/300-A SiC hybrid module can be reduced greatly using 1700-V SiC SBDs as free-wheeling diodes instead of the regular 1200-V ones. Considering the much larger leakage current of a SiC SBD compared with that of a Si p-i-n diode. It is feasible to use a SiC SBD with higher blocking voltage to reduce the significant leakage current of the free-wheeling SBD with almost no cost increase.

Vacuum tubes such as gyrotrons and magnetrons require a specific range of high-voltage pulse rise time for their proper operation. Otherwise, unavoidable operation modes or even arcs may take place in the vacuum tubes. Hence, the capability of the adjustable output pulse rise time is very promising for pulsed power supplies when they are dedicated to vacuum tubes. This article proposes a high-voltage series stacked insulated gate bipolar transistor (IGBT) switch with rise time adjusting capability to evolve the pulsed power supply abilities. The rise time adjustment is carried out using a low-voltage ramped shape signal provided for all the IGBTs via a multi-winding transformer. In this way, the IGBTs are turned on as fast as possible with specific delays. The sequential turn on process of the IGBTs forms the output pulse rising edge. Unlike the extant strategies for controlling the turn on speed of the IGBTs, the dissipated power of the proposed method is negligible. The power associated with adjusting the output pulse rise time is recovered to the pulsed power supply using a simple and low-voltage dc/dc converter. The proper performance of the proposed structure is evaluated using simulations and experimental prototyping.

As core components of power converters, the insulated gate bipolar transistor (IGBT) module is required to have long-term reliability in increasingly more applications. To assess and improve the reliability, power cycling (PC) tests are conducted to determine the lifetime of IGBT modules; these tests are very time-consuming and may take a couple of weeks or even months for a single sample. Therefore, an urgent need in the industrial community is to develop an accurate and efficient method to predict the lifetime of the IGBT modules. In this article, we present a lifetime prediction method, in which the self-accelerating effect of bond wire damage on the lifetime is considered by using the feedback from the collector–emitter ON-resistance degradation into the power loss model, and a degradation model is proposed to describe the degradation process of the collector–emitter ON-resistance. Base on the physical PC tests of IGBT modules, we demonstrate that the proposed method accurately and efficiently predicts the lifetime of IGBT modules.

In renewable energy and grid applications, solder-attached power modules are subject to fatigue stress cycles of low amplitudes, but the devices will be in service for decades. This article aims to understand the slow aging process by focusing on the initial defects and their growth under the stress cycles of concern. A finite-element analysis (FEA) is performed to obtain the thermomechanical stress distribution around the defects, which is combined with the solder material’s property to give a lifetime model. Effort is made to validate the model by power cycling plus microscale computed tomography (CT) scanning. It is found that a void in the solder layer may first transform into a crack on the material boundary, which then grows progressively more rapidly until device failure. A numerical example is shown for evaluating the lifetime of an IGBT power module in a “soft-open-point” (SOP) converter designed for an 11-kV power network.

A major problem faced in the conventional load-commutated current-source inverter (CSI)-fed synchronous motor drive is the commutation failure during low-speed operation due to insufficient back EMF. The scheme adopted by the industry as a solution to this problem is to employ pulsed mode operation during starting and at low speed. However, the pulsed mode operation results in undesirable high-torque pulsation. This article proposes a new scheme to facilitate hassle-free load commutation of CSI-fed synchronous motor drives during starting as well as at low speed without resorting to pulsed mode operation. The proposed scheme consists of an open-end winding synchronous motor with silicon controlled rectifier (SCR)-based CSI connected to one side of the stator windings and an IGBT-based voltage-source inverter (VSI) connected to the other side to aid commutation of SCRs when the back EMF is insufficient. The proposed scheme is experimentally verified on a 3-HP synchronous motor drive using a digital signal processor (TMS320F28335) for the implementation of the control scheme.

The behavior of the insulated gate bipolar transistor (IGBT) module results in the electric field, temperature field, and stress field, and there are strong coupling effects among its electrical, temperature, and mechanical characteristics. Meanwhile, the packaging failure of IGBT module is also the interaction results of multi-physical fields coupling. In this article, a multi-physical fields transient modeling method based on PSpice and COMSOL is proposed. This method synthesizes the advantages of the physical model and the finite-element model. According to the time constants of different physical fields, continuous simulation analysis is carried out on different timescales. Through flexible multispeed simulation strategy, the dynamic characteristics of IGBT devices at different timescales can be accurately characterized. First, the electric-thermal–mechanical coupling mechanism of IGBT is described. Then, the electrical model and thermomechanical coupling model of IGBT are constructed in PSpice and COMSOL, respectively, and the multi-physical fields simulation in multi-timescale is realized through the control file of MATLAB script. The proposed modeling approach is verified by a short-circuit test of Starpower 1200-V/50-A IGBT module. Finally, an example of multi-time-scale simulation analysis under short-circuit condition is given, and the reasons for module failure under multi-field coupling effect are studied.

To realize a soft-switching inverter with the advantages of simple structure, high efficiency, low voltage stress, and easy to control, a novel parallel resonant dc link inverter with the function of pulse current regeneration is proposed in this paper. All switches in the inverter main circuit can achieve zero-voltage-switching (ZVS) turn-on and ZVS turn-off. All switches in the auxiliary commutation circuit (ACC) can achieve soft-switching. The power in the ACC is small. Freewheeling diodes in the inverter turn off under the zero-current condition, which can reduce the reverse recovery loss of freewheeling diodes. In addition, the bulk capacitors are avoided in the circuit and there is no neutral point potential variation problem. At the same time, the zero-voltage duration is independent of the load current, and the time of transition can be selected freely. According to the equivalent circuits in different operation modes under the proposed modulation strategy, the operation principle, soft-switching implementation condition, and parameter design procedure of the proposed inverter are analyzed successively in this paper. Finally, a 10-kW–10-kHz soft-switching inverter prototype with insulated gate bipolar transistor (IGBT)-based switches is built. Experimental results are given to demonstrate the validity and features of the soft-switching inverter.

Lifting-off of Al bonding wires is one common failure mode of insulated-gate bipolar transistor (IGBT) modules during long-time operation. In the present work, the failure mechanism of Al wires lifting-off was investigated and the major factors were discussed based on both experiments and finite element (FE) simulations. It indicates that lifting-off of Al-wires is mainly determined by the interfacial thermal stress at the bonding interface. Thermal expansion of Al-wires and thermal mismatch of Al–Si interfaces contribute to the interfacial thermal stress which is affected by the resistance heat of Al-wires and power loss of Si-chips. Accordingly, a new lifetime model for the Al wires lifting-off failure mode of IGBT modules is proposed and verified through power cycling tests. The conduction current $I_{c}$ , the heating time $t_{\mathrm{\scriptscriptstyle ON}}$ , and the junction temperature swing $\Delta T_{j}$ are three major factors for the fatigue life model of IGBTs under Al wires lifting-off failure mode.

This paper proposes a single fault diagnostic method for regenerative permanent magnet synchronous machine drives with the ability to handle multiple insulated gate bipolar transistor faults, single current sensor fault, and rotor-position disconnection. The considered faults are discriminated, and the faulty device is correctly identified in each case. The robustness against false alarms is improved by using adaptive thresholds and normalized diagnostic variables. The proposed algorithm requires the information given by current sensors and the rotor position sensor that are already available from the drive system, without requiring a high computational burden. Simulation and experimental results are presented to validate the effectiveness of the considered algorithm for both motoring and regenerative operations.

This paper presents a time-sharing frequency doubler principle-based current-fed zero current soft-switching (ZCS) high-frequency-resonant (HF-R) inverter-based dc–dc converter for inductive power transfer (IPT) systems featuring a Silicon (Si) and Silicon Carbide (SiC) hybrid power module. The newly proposed resonant dc–dc converter is suitable for producing a higher frequency resonant current with switching power loss reduction by the effect of a high-speed punch trough Si-insulated gate bipolar transistor (IGBT) and low-forward voltage SiC-Schottky barrier diode (SBD). In order to continuously regulate the output power, resonant current phasor control based on phase shift modulation (PSM) is newly applied. The performances of the newly proposed IPT resonant power converter are demonstrated by experiment, after which the feasibility of the circuit topology and control method is discussed from a practical point of view.

The silicon (Si)/silicon carbide (SiC) hybrid switch comprising a Si insulated gate bipolar translator (IGBT) and a SiC metal-oxide-semiconductor field effect transistor (MOSFET) in parallel offers not only excellent performance and cost tradeoff but also inherent switch-level redundancy for potential power converter fault-tolerant operation. It is possible to operate the power converter even when either the SiC MOSFET or the Si IGBT experiences an open-circuit fault. This article first analyzes various switch failure scenarios and then proposes a novel fault-tolerant control strategy for a single-phase inverter based on the Si/SiC hybrid switches to mitigate a single-point switch failure and maintain inverter operation. Experimental results validate the effectiveness of the proposed fault-tolerant control strategy.

In this article, a practical electrothermal SPICE model is proposed based on finite differential method. Other than the conventional Fourier model and the Hefner model, the distribution of excess carriers can be accurately solved by a finite differential method in the SPICE simulation tool. In this method, the electrothermal behavior of the device is modeled by using a semi-mathematic model. In order to verify the modeling results, a self-packaging insulated-gate bipolar transistor (IGBT) module is tested in both static characteristics and dynamic characteristics, and the simulation results of the presented model fit well with the experimental results under different junction temperatures. More importantly, the finite differential method provided in this article is an approach for modeling bipolar devices, and it can also be applied to model widebandgap devices such as a SiC IGBT and a SiC BJT.

Various Si/SiC hybrid device concepts aim at achieving SiC performance at a significantly reduced cost in comparison to full SiC solutions. Both the insulated-gate bipolar transistor (IGBT)(Si)/Schottky(SiC) hybrid pair and the IGBT(Si)/MOSFET(SiC) hybrid switch offer a substantial reduction in switching losses but operate quite differently. This article compares the performance of these two hybrid device concepts in a voltage source inverter (VSI). The basic operation principle, conduction, and switching characteristics of the two hybrid configurations are directly compared, and an improved power loss model is developed for these two solutions in VSI. Two single-phase VSI prototypes using these two hybrid devices are built and tested, respectively. Experimental results show that a 1200-V hybrid IGBT/MOSFET solution achieves a significant efficiency improvement and a maximum junction temperature reduction compared to the hybrid IGBT/Schottky counterpart. The hybrid IGBT/MOSFET solution achieves a 40% higher power handling capability in the 20-kHz single-phase VSI or 1.5 times higher switching frequency in the 2-kW single-phase VSI than the hybrid IGBT/Schottky solution.

Limited by low availability, high price, and poor switching performance of high-voltage power devices, connecting low-voltage devices in series to block much higher voltages is always an option. However, severe voltage unbalance during turn-off transient remains to be solved. Most of the existing methods designed for low-speed silicon (Si) insulated gate bipolar transistor (IGBT) cannot be directly transplanted to the series-connected silicon carbide (SiC) MOSFETs with high switching speed. To maximum the switching performance of SiC MOSFETs, an elegant implementation of adjusting driving signal time delay method is proposed. In addition, a simplified model during drain–source voltage rising transient is discussed to basically reveal features and problems of the series-connected SiC MOSFETs. The factors affecting the appropriate time delay are discussed as well, especially the influence of the load current. The simplified model and the implementation are both verified by experiments. Indeed, the proposed active voltage balancing control works well and has no penalty of sacrificing switching performance of SiC MOSFETs.

Based on the features of different timescales and according to the characteristics of loss and heat transfer under those cases, a multi-timescale prediction model (MTPM) of insulated gate bipolar transistor (IGBT) junction temperature is presented in this paper, including a short-duration transient microsecond prediction model based on the semiconductor physical model and the theorem of heat absorption and emission, an unsteady millisecond-scale prediction model based on the equivalent switching loss set in databook and the order-reduced thermal model, and a steady second-scale prediction model based on the characteristics of a fundamental wave fluctuating periodically at junction temperature and the equivalent first-order thermal model. An experimental system has been designed and established for the verification of the proposed MTPM of IGBT junction temperature according to a corresponding timescale. The comparison result shows that the error between simulation and experiment is less than 5% and simulation efficiency is significantly improved.

This paper analyzes the crosstalk issues for a closed-loop active insulated gate bipolar transistor (IGBT) gate driver (AGD) based on di/dt and dv/dt detection and presents a crosstalk suppression (CTS) circuit. Closed-loop active gate drivers for IGBTs are beneficial in switching transient control by generating extra gate control signals to regulate the gate drive voltage or current with di/dt and dv/dt feedback. AGDs achieve the compensation of the IGBT nonlinearities and are independent of operating points. In a phase-leg configuration, however, AGDs produce additional crosstalk interference besides that due to reverse transfer capacitance. These two kinds of crosstalk interferences together lead to an oscillation in the IGBT gate voltage, and then a shoot-through fault may occur. An equivalent circuit model of the feedback circuit is presented to analyze and evaluate the crosstalk issues. The design and realization of a CTS circuit are presented to eliminate the crosstalk and extra gate drive losses caused by crosstalk. The experimental results substantiate the validity of the theoretical crosstalk analysis and the effectiveness of the proposed CTS circuit.

A planar phase-leg 650-V/240-A insulated-gate bipolar transistor (IGBT) module with 16 IGBT chips and 16 free-wheeling diodes has been demonstrated by pressureless sintering nanosilver paste to achieve extremely high power density and low parasitic inductance. Nanosilver paste was chosen as the die-attach material to increase the operation temperature as well as the power density and heat dissipation. The thermal coupling effect of so many power chips in parallel and the thermal performance of the planar IGBT module have been discussed. The electrical performance has also been characterized to verify the feasibility of the packaging process. The $I$ – $V$ curves between the two bridge arms were in good consistency, resulting from the symmetrical architecture. The low switching loss of the multichip planar IGBT module can be attributed to its low parasitic inductance since the removal of bonding wires and compact architecture. Thermomechanical reliability has also been investigated by the passive thermal shocking test of the module from −55 °C to 150 °C. In addition, the increment of $V_{\mathrm {CE(sat)}}$ of the modules reached the failure standard until 900 cycles.

Megawatt-class power converters need insulated gate bipolar transistors (IGBTs) with kiloampere current ratings. Conventional IGBT power modules face difficulty to meet the reliability and over-current requirements due to bond wires, solder joint, and single-side cooling limitations. Press-pack IGBTs overcome these drawbacks, but demands extremely tight tolerance control in chip screening and matching, module parts manufacturing, and assembly. In this paper, a new pressure contact package for high-current large-die IGBTs is proposed, modeled, and experimentally studied to allow a simpler packaging process. A large IGBT die, many times the size of a typical IGBT die, is designed with a unique layout of multiple segmented emitter pads and a common gate pad. A patterned polymer positioning frame is placed onto the die. Metal contact spacers are placed in the openings of the frame to connect the emitter lid to the IGBT emitter sectors. A collector contact disc is placed between the IGBT die and the collector lid. Finite-element (FE) analysis is conducted to evaluate the mechanical and thermal performance of the new package. A 3300-V, 14-cm2 active area, round-shape IGBT die is fabricated and packaged. Excellent electrical and thermal characteristics are demonstrated to validate the feasibility of the IGBT and package concept.

This paper gives a comprehensive analysis and characterization of power loss of a high-power integrated gate-commutated thyristor (IGCT) in a modular multilevel converter (MMC) for a high voltage dc application. The practical scheme, power loss models, calculation methods, characterization of MMC based on IGCT are analyzed in detail. Especially, a comprehensive comparison of both half-bridge MMC (HB-MMC) and full-bridge MMC (FB-MMC) based on IGCT, press-pack insulated gate bipolar transistor (IGBT), module-type IGBT, press-pack injection enhanced gate transistor (IEGT), and module-type IEGT is analyzed in this paper. According to the study in this paper, the snubber power loss of MMC based on IGCT is far less than the conduction and switching power losses. Both the conduction and switching power losses of IGCT are always lower than that of press-pack and module-type IGBTs and IEGTs in MMC. The power loss of FB-MMC is higher than that of HB-MMC with the same transmission power because more switches are employed in FB-MMC. If taking diodes into account, the HB-MMC and FB-MMC based on IGCT can decrease power loss about 1.9%–49.3% and 8.3%–45.1% under different operation states, respectively. The study in this paper will provide a valuable reference and promote the application of IGCT in MMC.

Applications under extreme conditions, such as solid circuit breakers and electromagnetic launching systems, are great challenges to semiconductor power devices. The die-attach solder joint is as one of the most vulnerable structures and critical to the reliability of insulated-gate bipolar transistor (IGBT) modules. In this paper, IGBT modules were cross sectioned and tested under pulse high-current power cycling. The failure mechanism of the die-attach solder in IGBTs at pulse high-current modes was investigated. Evolution of microdefects in the die-attach solder during power cycling was characterized and factors for the failure of die-attach solder joints was discussed. The results revealed that voids, cracks, and detachment of interface were the major microdefects in the die-attach solder layer. A detachment of the Si/Sn–Ag–Cu (SAC) interface is verified as the major failure mode under pulse high-current power cycling. Interface cracks between the Si-chip and die-attach solder layer were found to initiate first at the solder layer edges and then extended to the center of the solder layer with the increase of power cycles. The detachment of Si/SAC interface was more similar to the brittle fracture. The junction temperature swing and heating rate were the key factors for detachment of the Si/SAC interface.

This paper presents a new lumped-charge approach-based physical model for high power soft-punchthrough (SPT) insulated gate bipolar transistor (IGBT). The IGBT physical models should consider the fabrication technologies used to optimize the device behavior for specific applications. The proposed model focuses on the chip structure designed by ABB for high power IGBT and can apply to other IGBTs with homogeneous structures. Based on the SPT+ concept combined with an enhanced planar cell design for the optimization of lower power losses, different particular mathematical approaches are used to describe their functions in the proposed model. The temperature dependence of the model is also included because the chip temperature of IGBT in practical applications is higher than the room temperature and changed with service conditions. The physics-based IGBT model has been implemented in PSpice and validated with experiments, which considers both the block voltage nonpunchthrough condition and punchthrough condition during turn-OFF transient. The simulation results show a good agreement with the experiment results.

Implementation of real-time health assessment and thermal management of insulated gate bipolar transistors (IGBTs) require thermal equivalent circuit models that can be used to predict the junction temperature of the modules. Solder aging in IGBTs has a substantial impact on the accuracy of junction temperatures estimated by the models. This paper proposes an adaptive thermal equivalent circuit model that can estimate the junction temperature of IGBTs with precision under solder aging conditions. First, the solder aging process is monitored in real time by the temperature gradient of the baseplate of the IGBT module, which is easily implemented by placing two thermal sensors at the interface between the baseplate and the cold plate. Then, when the solder aging is detected, the actual junction temperature obtained by an ON-state collector–emitter voltage of the IGBT is utilized to update model parameters based on the thermal behavior of the device. By combining the two stages, the effect of solder aging on the accuracy of the junction temperature estimate is removed in time. Simulation and experimental results are provided to verify the effectiveness of the proposed method.

Field experiences have demonstrated that semiconductor devices are vulnerable to failures, which challenges the reliability of power conversion systems. One of the most effective methods to enhance system reliability is fault-tolerant techniques. Presently, the parallel redundant converter approach is considered as one of the most effective fault-tolerant methods. However, there are some issues regarding parallel converter systems, such as surge currents that nonfaulty converters experience after faults, fault-isolation time, and load voltage distortion. To address these issues, this paper investigates the fault analysis and fault-tolerant design regarding parallel inverter systems. The stage analysis for the parallel inverter systems in the case of insulated-gate bipolar transistor short-circuit failures is performed first. Then, the surge current and the corresponding fault-isolation duration are explored. Furthermore, a mathematical model is built to address these two issues, and a fault-tolerant design to suppress surge current is presented. Finally, the experimental results are provided.

Nanosilver paste was used in this study as a die-attachment material for 3300-V power chips to eliminate the pressure contact of a press-pack power module. The proposed insulated-gate bipolar transistor (IGBT) module was named as a sinter-pack IGBT module. We studied the effect of the assisted hydrostatic pressure, i.e., 0, 1, 3, 5, and 10 MPa, on the mechanical, thermal, and electrical performance of the as-sintered silver joints. As the pressure increased, the die-shear strength increased, and the thermal impedance decreased, as expected. The electrical properties of the assembly using the sintered silver were comparable with those of the chip with the same power rating, which proved the feasibility of the as-sintered IGBT specimens. The thermal resistance of the sinter-pack IGBT module decreased by 15.8% compared with that of the commercial press-pack one with the same power rating. The static electrical properties of the sinter-pack IGBT module were consistent with those of the commercial press-pack one, which further proved the feasibility of the sinter-pack IGBT module.

In the IGBT-based bidirectional isolated dual-active-bridge (DAB) dc–dc converter, it is not necessary that the IGBTs of the secondary-side H-bridge inverter (HB2) retain under on state because in this system, the function of synchronous rectification cannot be realized. This paper firstly analyzes the characteristics of the DAB converter with all of the IGBTs of HB2 keeping under OFF state. Its main drawback is that the flow back current in the primary dc side is caused and the current stress is increased. Furthermore, a hybrid modulation strategy is proposed and the control rule of the two inner phase shifts of the primary and secondary H-bridge inverters is determined to eliminate the flow back currents in the entire power range, enhance the maximum transfer power, and achieve a good inductor current characteristic. The experimental results verify the correctness of the theoretical analysis and the feasibility and practicability of the proposed hybrid modulation strategy.

Grid-connected converters in wind turbine systems play a more active role in the future power grid dispatching for fulfilling specified grid codes. Hence, the diversified demands and faults from grid sides bring more intense thermal fatigue to the power modules. This paper proposes an investigation method for junction temperature (T j ) variation considering grid code constraints in laboratory environment. For the most cases of 690-V wind power systems, an MW-level H-bridge test setup with energy circulation is established. In the case of particular grid code requirements and T j control strategy, the equivalent voltage and current stresses can be reproduced and applied to the inspected insulated gate bipolar transistor (IGBT) power modules. To investigate the real-time T j under specific work conditions derived by grid codes, turn-off delay time-based thermal electrical sensitive parameter method is used for T j estimation. Consequently, a test procedure for the safe operation boundary of power converter using T j limitation as a new criterion is proposed. Finally, three types of typical operation conditions for a 1.5-MVA power converter are chosen for the validation of the proposed method. The typical conditions under grid code requirements can be reproduced and the corresponding real-time T j variation can be extracted. With the T j acknowledge, the safe operation boundary and parameter optimizations of IGBT modules can be determined by real T j instead of case temperature.

This paper demonstrates various electrical and package design considerations in series connecting a high-voltage (HV) silicon (Si)-IGBT (6500-V/25-A die) and a silicon carbide-junction barrier Schottky diode (6500-V/25-A die) to form an HV current switch. The effects of connecting the cathode of the series diode to an IGBT collector, versus connecting the IGBT emitter to the anode of the series diode, are analyzed in regards to minimizing the parasitic inductance. An optimized package structure is discussed and an HV current switch module is custom fabricated in the laboratory. An HV double pulse test circuit is used to verify the switching performance of the current switch module. Low-voltage and HV converter prototypes are developed and tested to ensure thermal stability of the same. The main motivation of this paper is to enumerate detailed design considerations for packaging an HV current switch.

In this paper, a series Insulated Gate Bipolar Transistor (IGBT) chopping strategy is proposed for brushless DC motor (BLDCM) drive system with small capacitor and IGBT connected at the dc-link. When the output voltage of diode rectifier cannot satisfy the voltage required for normal operation of the BLDCM, in order to keep phase currents continuous and stable, the BLDCM is supplied by a dc-link capacitor and rectified mains supply alternately via dc-link IGBT chopping. Since energy from rectified mains supply is made best use of by dc-link IGBT chopping, energy provided by the capacitor can be reduced, and the required capacitance can be reduced accordingly. The reduction of the dc-link capacitance further reduces volume and weight of the BLDCM drive system, and improves the system reliability. The minimum required dc-link capacitance is designed from the view of energy. From another perspective, if a capacitor, whose value is larger than the minimum required one, is selected, more energy can be provided to the BLDCM due to making full use of energy from the rectified mains supply, which will make the BLDCM have a stronger ability to control currents. The correctness of the theories and the effectiveness of the proposed strategy are verified by the experimental results.

Leakage current reduction is crucial for the transformerless photovoltaic inverters. The conventional three-phase current source H6 inverter suffers from the large leakage current, which restricts its application to transformerless PV systems. In order to overcome the limitations, a new three-phase current source H7 (CH7) inverter is proposed in this paper. Only one additional Insulated Gate Bipolar Transistor is needed, but the leakage current can be effectively suppressed with a new space vector modulation (SVM). Finally, the experimental tests are carried out on the proposed CH7 inverter, and the experimental results verify the effectiveness of the proposed topology and SVM method.

For power electronic systems to interface medium-voltage grids, e.g., in future electric ships, usually cascaded cells converters need to be employed, whereby either few cells featuring power semiconductors with high blocking voltage capability or a larger number of cells using low-voltage (LV) semiconductors can be used. As shown in this paper, physics-inspired empirical models of the dependence of Insulated-Gate Bipolar Transistor (IGBT) power modules' loss-relevant characteristics on the blocking voltage enable an analytic optimization of the efficiency of a cascaded H-bridges (ac-dc) converter, which is complemented by a full efficiency versus power density ηρ-Pareto optimization. For a 10-kV grid, 1200V or 1700V are identified as optimum blocking voltages, resulting in a suitable trade-off between efficiency and power density. Significant efficiency and power density gains can be realized by replacing silicon IGBTs by LV silicon carbide (SiC) devices in multi-cell systems, whereas single-cell designs based on high-voltage SiC devices suffer from the high dv/dt and di/dt values required to limit switching losses. Reliability is analyzed considering redundancy, showing that the reliability of designs based on lower blocking voltages can be comparable with that of designs using higher blocking voltages, and hence fewer cells, if similar effort concerning additionally installed power capability is considered.

The 15-kV silicon carbide (SiC) MOSFET and 15-kV SiC IGBT are the two state-of-the-art high-voltage SiC devices. These high-voltage SiC devices enable simple two-level converters for a medium-voltage (MV) voltage source converter (VSC) topology compared with the complex three-level neutral point clamped and other multilevel topologies, which, otherwise, is required to realize for MV VSC with silicon devices. This paper characterizes the 15-kV SiC MOSFET module at 10- and 12-kV dc bus for two different configurations of the device under test. This paper also presents endurance test (continuous switching-mode experimental demonstration) of 15-kV SiC MOSFET for 10-kV output voltage for both a bidirectional and unidirectional dc-dc boost converter. Furthermore, this paper presents: 1) the switching loss comparison of 15-kV SiC MOSFET with 15-kV SiC IGBT for the same dv/dt condition; 2) the switching frequency limits of 15-kV SiC MOSFET for a dc-dc boost converter with a phase leg configuration at 10-kV output voltage; and 3) comparative evaluation of 15-kV SiC MOSFET and 15-kV SiC IGBT in a unidirectional dc-dc boost converter for 10 V output voltage.

This paper deals with a 3-D development of a thermal model of a power electronic converter mounted on the generator shaft and rotating with it. The dimensions of the heat sink are determined, and the temperature gradients of the converter, its heat sink, and shaft during natural and forced convection are analyzed for variable rotor speeds. It is shown that the chosen sizes of the insulated gate bipolar transistor (IGBT) and the heat sink offer a compact design of the rotating converter, which is sufficient for its mounting in limited space offered by the generator shaft. Furthermore, a transient temperature profile is also presented. In addition, a transient thermal profile of the converter and dimensions of the cooling fan are also calculated. Besides, the analysis of the cooling requirements of the converter during over-currents due to grid faults is also investigated.

Grid-connected photovoltaic (PV) inverters have a dc/dc converter connected to the PV for executing the maximum power point tracking. The design of an interleaved boost converter (IBC) with three switching legs for a 10-kW PV inverter is presented in this paper. This paper shows how the use of silicon carbide (SiC) switches and powdered iron core inductors enables the operation of the converter at a higher switching frequency and when increasing the converter power density. The IBC is designed using a 1.2-kV SiC MOSFET and Schottky diodes and Kool $\text{M}\mu $ powdered iron inductors. The design is compared with an IBC built with a silicon (Si) IGBT, fast recovery Si diodes, and ferrite cores. The use of SiC devices reduces the switching loses drastically and there are no reverse recovery losses, resulting in improved efficiency. The higher frequency and higher saturation flux density of the powdered iron core enable the reduction in core size by three times. A 10-kW prototype is built and tested for both the Si and SiC designs and compared with theoretical estimations.