1. An embedded 65 nm CMOS baseband IQ 48 MHz-1 GHz dual tuner for DOCSIS 3.0
- Author
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Bruce J. Currivan, Lin He, Loke Kun Tan, Tao Wu, Dongsoo Koh, Young Shin, P. Vorenkamp, Frank Singor, Ramon A. Gomez, Pete Cangiane, Francesco Gatta, James Y. C. Chang, E. Zencir, Leonard Dauphinee, Takayuki Hayashi, Jianhong Xiao, D.S.-H. Chang, G. Cusmai, Hans Eberhart, Massimo Brandolini, M. Introini, Hanli Zou, Tai-Hong Chih, and Bryan Juo-Jung Hung
- Subjects
Engineering ,Computer Networks and Communications ,Computer science ,business.industry ,Bandwidth (signal processing) ,DOCSIS ,Electrical engineering ,Tuner ,Cable television ,Computer Science Applications ,Phase-locked loop ,CMOS ,Embedded system ,Broadband ,Electronic engineering ,Cable modem ,Baseband ,System on a chip ,Electrical and Electronic Engineering ,business - Abstract
An embedded CMOS digital dual tuner for DOCSIS 3.0 and set-top box applications is presented. The dual tuner down-converts a total of ten 6 MHz Annex B channels or eight 8 MHz Annex A channels, for a maximum data rate of 320 Mb/s in Annex B and 400 Mb/s in Annex A mode. The dual tuner exceeds all the stringent SCTE 40 specifications over the 48-1004 MHz bandwidth, without using any external components or SAW filters. Enabling technologies are a harmonic rejection front-end, a low-noise high-frequency resolution phase-locked loop (PLL) and digital image rejection. To our knowledge this is the first reported multi-channel Broadband Tuner embedded in a DOCSIS 3.0 System on a Chip implemented in a 65 nm pure digital CMOS technology.
- Published
- 2010
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