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This paper presents a technique of harmonic minimization from output voltage waveform of a reduced switch Multilevel Inverter (MLI) through an efficient bio inspired metaheuristic algorithm called Black widow optimization (BWO). The proposed reduced switch 13- level MLI scheme uses a single Photovoltaic (PV) source which can be suitable for grid integration. The proposed BWO algorithm minimizes the Total Harmonic Distortion (THD) of output voltage with low operational time compared to other existing nature based algorithms considering large searching area. The weighted THD (WTHD) of the output voltage is also minimized in order to reduce the effect of lower order harmonics from the output voltage in a greater extent. The convergence rate and level of accuracy of BWO algorithm is compared with two different bio inspired algorithms for justification. The MLI operation is carried out with fundamental frequency, minimizing the switching stress while lowering the power loss compared to PWM or Sinusoidal PWM switching schemes. A single PV panel with multi winding flyback converter is used for medium voltage application through reduced switch MLI, serving the purpose of both isolation and reduction of energy sources. Simulation and experimental analysis are carried out with online control technique using a three phase 13-level reduced MLI to validate the proposed concept on a practical system.

Low reliability of the inverter is caused by high failure rates of semiconductor components and capacitors as well as high requirements for these components in the design of multilevel inverter topologies. The primary challenges in the reported fault-tolerant topology solutions include high component count, handling single and multiple switch faults, handling open and short switch failures on all fault locations, and achieving natural voltage balancing of the capacitors. This paper proposes a highly resilient fault-tolerant topology to accomplish the above challenges without compromising efficiency during faulty conditions. The acquired experimental results verify the proposed topology’s robustness and efficacy. The proposed topology is evaluated by considering multiple instances of switch failures to encompass various fault locations and types. A comparison with the recently reported fault-tolerant MLI topologies verifies the superiority of the proposed topology.

Reducing ripples on the capacitor voltage has two benefits: improved output waveform quality and accurate converter size. During the generation of a given output voltage level, the factor “Inherent Redundant Paths (IRPs)” has a considerable impact on the characteristics of multilevel inverter design. The consistent distribution of power loss derives from the Active Neutral Point-Clamed Inverter’s intrinsic redundant route at zero-voltage level generation. Even though it has been claimed that adding intrinsically redundant routes might give fault-tolerance capabilities to MLI topologies, the utilization of these pathways at intermediate voltage levels has not yet been studied. Based on this, the current research provides a unique charging and discharging technique is known as the alternating charging and discharging approach, which reduces capacitor voltage ripple. In addition, the suggested technique permits the inherent voltage balancing of capacitors without the need for supplemental components. The suggested alternative charging and discharging approach is implemented under both healthy and varied switch failure circumstances. In a laboratory prototype, the efficacy of the suggested alternative charging and discharging technique has been empirically tested.

Multilevel inverters are used in a number of high-power applications, including industrial motor drives, flexible power transmission, and, renewable energy systems. Since the MLI design incorporates a large number of devices, the system’s reliability suffers. This has caught the interest of academics all over the world, who are searching for methods to increase the dependability of the MLI design and include fault-tolerant qualities into it, either through software or hardware. Redundancy is a method that has recently gained popularity in solid-state transformer applications where fault tolerance is a highly desired quality. This is because the method provides for greater fault tolerance. The goal of this research is to offer a complete knowledge of the fault tolerance capabilities of MLIs created by the research community over the last few years