1. Demonstration of an extendable and industrial 300mm BEOL integration for the 65-mn technology node
- Author
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D. Reber, V.H. Nguyen, E. Mastromatteo, D. Bunel, J. Van Hassel, C. Monget, T. Berger, R. Gonella, C. Verove, C. Cregut, Robert Fox, O. Belmont, E. Sabouret, Alexis Farcy, J.P. Jacquemin, Emmanuel Josse, P. Vannier, J. Mueller, O. Hinsinger, Aurelie Humbert, W. F. A. Besling, Phillip Christie, C. Goldberg, B.G. Sharma, and P. Brun
- Subjects
Engineering ,Computer architecture ,Nanoelectronics ,business.industry ,Electronic engineering ,Key (cryptography) ,Copper interconnect ,Node (circuits) ,Process architecture ,Architecture ,business ,Scaling ,Parametric statistics - Abstract
Given the much discussed challenges of interconnect scaling at the 65-nm node, the choice of process architecture is a key determinant of performance and extendibility. An alternate trench-first with hardmask integration is described in this work, including subsequent benefits. BEOL design rules are detailed for the 65-nm architecture, supporting both "low-k" and "ultra-low-k" backends, satisfying RC scaling requirements. Electrical parametric performance and yield are presented for a fully-integrated 300mm backend utilizing 65-nm design rules demonstrating the viability of this architecture for the 65-nm node and beyond.
- Published
- 2005
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