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The stress-induced leakage current (SILC) in carbon nanotube (CNT)-MOSFETs based on a previously developed model for the steady-state component of SILC across the ultra-thin gate oxide of a MOS capacitor is calculated. It was found that the contribution of the component due to SILC in the gate current of MOSFETs must not be neglected. It was also found that SILC is larger in the source side than in the drain side.

A technique for evaluating the generation rare profile of MOS structures based on the measurement of gate current transients at two different gate voltage waveforms in non-equilibrium nonsteady-state is presented. The method allows the evaluation of the generation rate profile in the bulk of inhomogeneously doped MOS structures without requiring knowledge of the doping profile and provides, in contrast to high frequency methods, reliable results in such cases where MOS structures with high series resistances are to be investigated. >

The stress-induced leakage current (SILC) in short-channel n-MOSFETs is calculated based on a previously developed model for the steady-state component of SILC across the ultra-thin gate oxide of a MOS capacitor. It is found that the contribution of the component due to SILC in the gate current of MOSFETs must not be neglected. It is also found that SILC is larger in the source side than in the drain side.

Electroluminescence (EL) spectroscopy in combination with drift-diffusion simulations was used to prove the presence of impact ionisation in AlGaN/GaN HEMTs illustrated on InGaN back-barrier devices. Regardless of the level of gate leakage current, which is dominated by contributions such as surface leakage current and others, EL enabled the revealing of hole generation due to impact ionisation. Hole currents as low as 10pA were detectable by the optical technique used., United States. Office of Naval Research Global (N00014-08-1-1091)

The gate tunnelling current of MOSFETs is an important factor in modelling ultra-small devices. In this reported work, the gate tunnelling current in present-generation MOSFETs is studied. Presented is a model for the gate tunnelling current in MOSFETs having ultra-thin gate oxides. In the proposed model, the electron wavefunction at the semiconductor–oxide interface is calculated and inversion charge by assuming the inversion layer as a potential well, including some simplifying assumptions. Then the gate tunnelling current is calculated using the calculated wavefunction. The proposed model results have excellent agreement with experimental results in the literature.

The study of He plus remote plasma nitridation (RPN) technology for an ultra-thin gate dielectric in the 18-22 /spl Aring/ range is reported. Experimental results show that He can enhance the RPN process to reduce the gate current and effective thickness of gate dielectric films, especially for thinner gate dielectric films. In addition, the He plus RPN process allows the integrity of the ultra-thin gate dielectric film to be retained even in a high-density plasma environment.

A new measurement method is presented for determining when the impact ionisation (I-I) effect occurs in HEMTs. Until now the gate current or side gate current have been used as criteria, whereas in this Letter the noise factor is used. As will be described, this method is more accurate and less harmful to the devices.

The gate current of LT-GaAs passivated MESFETs has been analysed. For the first time, the bell shape of this current is not due to an ionisation mechanism. Moreover, the electrical properties of the LT-GaAs material are observed to change with polarisation conditions. This phenomenon has been confirmed by electrical measurements performed at different temperatures.

Dual-gate AlSb/InAs HEMTs with 0.4 µm gate lengths have been fabricated, and exhibit a significant reduction in the gate leakage current associated with holes generated by impact ionisation. These HEMTs also have decreased output conductance and increased low frequency unilateral gain compared to single gate devices.

With some types of nchannel junction f.e.t.s the measurement of gate leakage current under operating conditions (with a current flowing in the channel) has shown a very much higher value than would be expected from the maker's specification of IGSS. The excess gate current which flows at higher channel voltage is proportional to the drain current and has a small negative temperature coefficient.

The application of the charge concept is proposed for determination of transient waveforms of field-effect transistors. The charge equations of field-effect transistors are derived, giving the drain current as a function of the charge transported by the gate current during the transient.

Factors governing the direct gate current in silicon field-effect transistors are reviewed, and a mode of operation which results in zero d.c. gate leakage is described. This leads to the postulation of a new d.c. equivalent circuit for the field-effect-transistor gate.