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The authors report the fabrication of double selfaligned advanced bipolar transistors using base etched selfaligned transistor technology (BESTT). The main feature of these transistors is that the base and emitter contacts are self-aligned although using only a single poly layer. The fabrication and DC electrical measurements are discussed.

The modelling of the high current falloff of the transition frequency f1 of bipolar transistors, relies on the definition of a current-dependent delay time. This current dependence of the forward delay time Tf (normal active mode), as expressed in some computer-aided design programs, is considered in the letter.

The current injected into a shallow emitter is studied using a two-dimensional numerical solution of the transport equations, including the effects of bandgap reduction, lifetime and surface recombination velocity. The present results show clearly the correlation between the injected current and the bowl-shaped emitter area as well as the width of metal contact.

The communication presents a set of design curves of collector-emitter breakdown voltage BVceo versus gain hFE for various collector doping levels and thickness for n-p-n transistors. The results include epitaxial layer punch through and radial c-b junction breakdown.

The communication describes a sensitive photodetector system consisting of a p-i-n photodiode followed by a baseband parametric upconvertor. The overall noise performance is shown to be potentially better than that of existing avalanche photodiode systems.

The effective surface recombination velocity is determined analytically for a doped polysilicon contact to the emitter of a bipolar transistor in the presence of a thin interfacial oxide layer. Results are presented for various doping levels, oxide thicknesses and barrier heights. The analysis considers both tunnelling and thermionic emission through the interface.

The letter discusses the computer execution time for the DC solution of nonlinear networks using a particular analysis program, based on piecewise linear methods. A simple but effective technique is shown to considerably reduce the execution time; it is expected that the method could be applied to other programs based on PWL methods.

Monochromatic visible light at various wavelengths was used to generate photocurrent in a silicon n+-p diffused diode. A numerical model which includes electric field, heavy doping band gap reduction and doping level mobility dependence was used with fitting techniques to determine the carrier lifetime in the n+-region at each wavelength.

A comparison is made between one- and two-dimensional analysis of injection into the diffused region of small n+-p diodes using a numerical iterative scheme. Results are presented which show clearly the limitation of the one-dimensional analysis.

A Schottky transistor logic (STL) gate is studied using computer simulation. The relation between propagation delay time and the spacing between the diffused emitter and the isolation oxide is shown to be such that an optimum spacing exists.

The effect of amplitude noise or spurious signals in a varactor frequency multiplier is examined, and it is found that there is a relative ‘spurious’ power gain of about 2 between the input and output of a doubler. Experiments confirm this result.

Three different types of p+-n-n+ device are considered, each having an effective centre-layer width much less than a minority-carrier diffusion length. Using simple arguments, the transient behaviour for `current switching4210633 is analysed, and some basic parameters pertinent to modelling of such devices are derived.

A figure of merit is defined which may be applied to any of the common types of optical-envelope detectors such as photo-multipliers and photodiodes. It is evaluated for two special groups: (a) when the amplifier noise and dark current are negligible, and (b) when the quantum-noise term is negligible.

The efficiency of charge-storage diode frequency multipliers is calculated as a function of the order of multiplication and the recovery time for two basic circuits. Results are presented in the form of graphs.

It is shown that the low-level minority-carrier lifetime in p+-n-n+ diodes obtained by measuring the stored charge can be in error owing to the charging of the depletion-layer capacitance. A simple method is described for eliminating the error due to this charge.

Using a finite-section model for bipolar transistors with current-dependent base resistance and gain, high-current asymptotic variations of base resistance, gain and effective emitter width are studied, and useful analytic formulas are presented.