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MOVPE regrowth of III-V materials on a directly-bonded InP-SiO2/Si (InPoSi) membrane is of particular interest to transpose the III-V mature multi-regrowth technologies [1][2][3] from the InP substrate classical platform into the hybrid III-V on Si platform [4]. MOVPE requires high-temperature elevation, typically above 600°C. We have shown for the first time void formation in a directly bonded InPoSi membrane at high temperature (400°C) despite the use of a thick oxide at the bonding interface [5]. The demonstration of highly efficient outgassing trenches under high temperature annealing as well as MOVPE regrowth of a high-quality III-V heterostructure was obtained. Subsequent improvements in the treatments of the bonded surfaces allowed to achieve MOVPE regrowth of high-quality III-V material without the use of any outgassing methods [6]. In particular, a compressive strain of 400 ppm at growth temperature was shown for the first time by curvature measurements carried out during growth. The latter is due to the difference of thermal coefficients between InP and Si [7]. Despite this thermal strain, a 3 μm-thick laser structure was successfully grown on InPoSi and compared to the same structure on InP as a reference [8]. Device performance are similar for both structures showing that there is no penalty induced by regrowing μm-thick structures onto InPoSi in spite of the thermal strain. References [1] V. Rustichelli et al., “Monolithic integration of buried-heterostructures in a generic integrated photonic foundry process,” IEEE J. Sel. Top. Quantum Electron., vol. 25, no. 5, Sep. 2019 [2] N. Dupuis et al., “10-Gb/s AlGaInAs Colorless Remote Amplified Modulator by Selective Area Growth for Wavelength Agnostic Networks,” IEEE Photonics Technol. Lett., vol. 20, no. 21, pp. 1808–1810, 2008. [3] H. Debregeas et al., “TWDM-PON Burst Mode Lasers with Reduced Thermal Frequency Shift,” J. Light. Technol., vol. 36, no. 1, pp. 128–134, Jan. 2018. [4] B. Szelag et al., “Hybrid III–V/Silicon Technology for Laser Integration on a 200-mm Fully CMOS-Compatible Silicon Photonics Platform,” IEEE J. Sel. Top. Quantum Electron., vol. 25, no. 5, pp. 1–10, Mar. 2019. [5] C. Besancon et al., “Kinetic study of hydrogen lateral diffusion at high temperature in a directly-bonded InP-SiO2/Si substrate,” Nanotechnology, vol. 31, no. 13, p. 135205, Mar. 2020. [6] C. Besancon et al., “Epitaxial Growth of High-Quality AlGaInAs-Based Active Structures on a Directly Bonded InP-SiO2/Si Substrate,” Phys. Status Solidi Appl. Mater. Sci., vol. 217, no. 3, Feb. 2020. [7] K. Takeda, S. Matsuo, T. Fujii, K. Hasebe, T. Sato, and T. Kakitsuka, “Epitaxial growth of InP to bury directly bonded thin active layer on SiO2/Si substrate for fabricating distributed feedback lasers on silicon,” IET Optoelectron., vol. 9, no. 4, pp. 151–157, 2015. [8] C. Besancon et al., “Comparison of AlGaInAs-Based Laser Behavior Grown on Hybrid InP-SiO₂/Si and InP Substrates,” IEEE Photonics Technol. Lett., vol. 32, no. 8, pp. 469–472, Apr. 2020.

Suspended, stacked and rounded nanowires with diameters as small as 5nm have been obtained thanks to thermal oxidation. Those structures can be used for novel 3D Gate-All-Around Field Effect Transistor (GAAFET) architectures. As the oxidation rate is strongly affected by the nature of the oxidant, the temperature and the wire curvature, both wet and dry oxidations (at 950{degree sign}C and at 1100{degree sign}C, respectively) have been investigated. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) were used to characterize the shape and the oxidation kinetic of the oxidized Si nanowires compared to planar references.

Based on electrical measurements and transmission electron microscopy imaging we propose in this paper a possible explanation for the measured mobility degradation with gate length reduction in short-channel MOSFETs. The carrier mobility in end-of-range implantation regions was investigated in Silicon-On-Insulator (SOI) and tensily-strained Silicon-On- Insulator (sSOI) substrates. Wafers with ultrathin films (from 8 to 35 nm) were Ge implanted at various concentrations, then annealed. The Pseudo-MOSFET measurements showed a mobility decrease (from 5 to 34%) as the implantation dose increased. The results are relevant for the optimization of the sources and drains regions of advanced nano-scale SOI transistors.