15 results on '"M. Pierre"'
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2. Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration.
3. Design Principles for Packet Deparsers on FPGAs.
4. CARLA: A Convolution Accelerator with a Reconfigurable and Low-Energy Architecture.
5. Bridging the Gap: FPGAs as Programmable Switches.
6. PoET-BiN: Power Efficient Tiny Binary Neurons.
7. An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs.
8. Module-per-Object: a Human-Driven Methodology for C++-based High-Level Synthesis Design.
9. P4-compatible High-level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs.
10. SHIP: A Scalable High-performance IPv6 Lookup Algorithm that Exploits Prefix Characteristics.
11. Accurate and Efficient Hyperbolic Tangent Activation Function on FPGA using the DCT Interpolation Filter.
12. Extern Objects in P4: an ROHC Compression Case Study.
13. Memory Efficient Multi-Scale Line Detector Architecture for Retinal Blood Vessel Segmentation.
14. Neural Discourse Modeling of Conversations.
15. On the Automated Classification of Web Sites
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