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Purpose – To give an overview about market trends and driving forces of halogen-free materials for PCB applications. The paper also includes an overview about new halogen-free raw materials developed to meet the market demand. Design/methodology/approach – The paper does not intend to deal with scientific aspects, i.e. whether halogenated flame retardants (FR) are bad or not. The goal of this paper is to explain why there is a discussion about FR and what is driving the market to environmentally friendly products. Findings – Halogen-free technology has been evolving for more than 15 years, but it has only gained significance in the past three to four years. It developed from a marketing concept to a real market (although still considered as niche), where the products offered can now meet demand. The paper explains the background to halogen-free and the motivation for OEM's to switch to halogen-free, as well as giving an overview of the current status. Originality/value – Provides a market and technology review about state-of-the-art technology and new products being developed. [ABSTRACT FROM AUTHOR]

Purpose – The submodeling technique is incorporated in a finite element analysis to investigate the stress state of blind vias of different structural configurations. Design/methodology/approach – The test vehicle is a multi-chip module plastic ball grid array comprised of a four-layer build-up substrate. The calculated displacement field from the global model for the entire package is interpolated on the boundaries of the submodel, which involved the detailed structure of a blind via structure. Through the analysis, the potential of fracturing on the blind via is examined. Findings – From the analysis it was found that filled blind vias in general have a smaller potential for delamination compared to the unfilled ones. Moreover, symmetric blind via layouts with a blind via located at the center of the through hole appear to be the most appropriate design for this particular test vehicle. Originality/value – The value of the paper lies in its ability to provide insights into the prevention of fracturing of blind vias in a build-up substrate through a novel numerical analysis using the submodeling technique. [ABSTRACT FROM AUTHOR]

Purpose – There are many considerations that have to be taken into account when balancing the properties epoxy-based laminate and prepreg materials must have in order to meet the array of electrical, thermal and mechanical demands of today's multilayer printed circuit boards. Aims to discuss two different curing systems that are commonly employed in current laminate and prepreg materials. Design/methodology/approach – An examination of the two different curing systems – phenol novolac (PN) and dicyandiamide (DICY) based – that are commonly employed in current laminate and prepreg materials. Findings – DICY curing systems have properties such as good flexibility, good adhesion and good processability but have poor thermal resistance, higher water absorption and poor anti-CAF capability. Because PN resin systems utilize an aromatic ring structure, traditional PN cured epoxy resin results in having excellent thermal resistance, low water absorption and anti-CAF capability. Originality/value – Provides a comparison of interest to all those involved with laminate and prepreg materials in the circuit board industry. [ABSTRACT FROM AUTHOR]

Purpose – To review a newly developed PCB fabrication process based on a parallel lamination technique. Design/methodology/approach – This paper has been written to introduce the SAVIA process, a new parallel lamination technique for PCB fabrication. The basic concept of the SAVIA process has been described along with the individual process steps and the reliability issues. The advantages of SAVIA process have been also discussed in both economical and technological aspects. Findings – It was found that the parallel lamination technique, a key process for SAVIA, was not only highly flexible and reliable but also a cost-effective fabrication method for high performance PCB. With the SAVIA process, manufacturing lead-times can be substantially reduced due to the nature of the parallel processing. It was also confirmed that a highly reliable metal alloy interconnection was created between the core and the adhesive layers during the lamination process. The formed metal alloy contacts showed excellent electrical and physical characteristics. The between layers was precise. Originality/value – The value of this paper is to introduce a novel PCB fabrication process based on a parallel lamination technique that is superior to conventional build-up processes from both technological and economical viewpoints. By applying a parallel lamination technique, it is expected that fabrication costs can be lowered due to reductions in manufacturing lead-time. [ABSTRACT FROM AUTHOR]

Permittivity and dissipation factor (Dk and Df) are effects of polarization of different components of the dielectric substrate material when subjected to an electrical field. A database of these important design parameters for PWBs has been developed for Thermount RT. Effects of variations in the level of moisture (bone-dry to completely saturated at various relative humidity levels), testing temperature (room temperature to 120uC) and testing frequencies (1MHz to 1.5GHz) on Dk and Df are reported. As the frequency of test is increased from 1MHz to 1.5GHz, the effect of moisture on the properties is reduced. Comparison with conventional glass/FR4 laminate properties shows the distinct advantage of Thermount. It is increasingly used in high frequency cellular telephone, satellite, and wireless applications which require HDI PWBs to achieve the highest packaging density at the lowest cost and weight. [ABSTRACT FROM AUTHOR]

While promising significant improvements in the cost and performance of electronic systems, the advent of new area array packaging concepts such as the BGA and newer area array CSPs has placed significant new demands on the substrates used in their interconnection. New methods such as build-up multilayers and micro vias and co-lamination of inner layers have been described and implemented by a number of different firms in an attempt to address this important issue. One such method employs simple double-sided plated through hole flex circuits and the use of conductive pastes and bondplies to provide reliable electrical and mechanical connection between layers during a simple lamination cycle. The process, briefly described herein as a co-laminated multilayer flex, is detailed in terms of both process steps and manufacturing flow. The structure of the interconnection substrate is also modeled and examined to determine its electrical performance potential according to electrical modeling software. Finally, detailed are the performance of the structure in reliability testing and an analysis of the expected design and performance advantages that might be obtained by such type constructions in combination with BGAs and area array CSPs. [ABSTRACT FROM AUTHOR]

Based on the superior properties of the COPNA resin laminate exhibiting Tg at 255∞C, small CTE at 5-7 ppm (xy-axis) and at 29 ppm (z-axis), reliability of both two-layered and six-layered printed wiring boards using COPNA resin as a matrix were evaluated. In the case of the two-layered system, it exhibited higher reliability than the FR-4 graded epoxy-resin laminate in the entire tests, and exhibited higher reliability than the BT resin laminate in the THB test, heat-shock test, and heat-cycle test. In the case of the six-layered system, it also exhibited higher reliability than the BT system in both heat-shock test and PC test. [ABSTRACT FROM AUTHOR]

Non-woven laminates have begun to gain recognition in the electronics industry because they are generally thinner and flatter than woven laminates. This study characterizes the mechanical and thermo-mechanical properties of non-woven, randomly dispersed, short fiber laminates, and identifies potential failure mechanisms which must be addressed in the design and utilization of printed circuit boards using non-woven technology. [ABSTRACT FROM AUTHOR]