18 results on '"Cheng-Kok Koh"'
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2. Delay-driven layer assignment for advanced technology nodes.
3. MCMM clock tree optimization based on slack redistribution using a reduced slack graph.
4. Fast clock skew scheduling based on sparse-graph algorithms.
5. Analytical placement of mixed-size circuits for better detailed-routability.
6. Simultaneous redundant via insertion and line end extension for yield optimization.
7. SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design.
8. Adaptive admittance-based conductor meshing for interconnect analysis.
9. SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices.
10. Process variation robust clock tree routing.
11. Compact and stable modeling of partial inductance and reluctance matrices.
12. Post-layout logic duplication for synthesis of domino circuits with complex gates.
13. Improving the scalability of SAMBA bus architecture.
14. Floorplan management: incremental placement for gate sizing and buffer insertion.
15. Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocessor.
16. A high performance bus communication architecture through bus splitting.
17. Integer linear programming-based synthesis of skewed logic circuits.
18. A metric for analyzing effective on-chip inductive coupling.
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