Search

Enhanced diffusion of B is observed during the growth of ion bombarded epitaxial layers by Si molecular beam epitaxy. Ion-assisted methods are generally required for high levels of n-type doping, and we find that the damage caused by the low-level ion bombardment is responsible for the enhanced diffusion of B. Furthermore, the concentration profiles of as-grown and post-growth annealed samples show that the diffusion is a transient effect that occurs at the growth temperature of 600–700 °C. Simulation of the diffusion process demonstrates that nearly all of the B is participating in the diffusion and that the built-in electric field at the p-n junction leads to a further smearing of the B profile. [ABSTRACT FROM AUTHOR]

We present the first experimental identification of the diffusion mechanisms of Ge in Si. Using thermal nitridation reactions to create either excess self-interstitials or vacancies, it is established that under equilibrium conditions at 1050 °C Ge diffusion takes place by both substitutional-interstitial interchange and vacancy mechanisms, with comparable contributions from each. If previous conjectures that Ge diffusion in Si is similar to Si self-diffusion are correct, our findings support the idea that Si self-diffusion takes place by both interstitial and vacancy mechanisms. [ABSTRACT FROM AUTHOR]

The influence of growth temperature on the interfacial abruptness of strained Ge layers, a few monolayers thick, embedded in Si has been studied using Raman spectroscopy to identify the presence of GeGe and GeSi bonds and medium energy ion scattering to characterize the spatial extent of the layers. Atomically sharp interfaces are observed for growth temperatures just above the crystalline to amorphous transition range, with pseudomorphic growth found for growth temperatures >∼250 °C. Asymmetric mixing of Ge into the Si capping layer occurs during growth at higher temperatures. Significantly less intermixing occurs on annealing after growth, pointing to the role of dynamical processes occurring at the growth front. [ABSTRACT FROM AUTHOR]

An interfacial boron spike is formed during the molecular beam epitaxial growth of Si. We show two possible sources for this unintentional spike. We have found that some boron contamination invariably occurs when silicon surfaces are exposed to air. A greater degree of contamination results when the sample is heated to temperatures greater than 800 °C, as required for creating an atomically clean surface prior to molecular beam epitaxial growth. A source of boron suboxides, internal to the ultrahigh-vacuum system, was detected by residual gas analysis. While anneals at 1000 °C or greater result in almost complete activation of the B, we observe that for a cleaning regimen at 850 °C, less than 10% of the boron is active. Our results are consistent with the oxidation of the suboxides on oxygen-contaminated surfaces and their subsequent reduction at higher temperatures by silicon, with the volatization of SiO. Subsequent incorporation is by indiffusion. [ABSTRACT FROM AUTHOR]

The Raman active vibrational modes of single, 1 to 6 layer thick Ge films grown epitaxially on Si(100) and covered by thin layers of Si(100) have been measured. Both the Ge-Ge vibrations from the interior of the Ge films and the Ge-Si vibrations at the Ge-Si interfaces have been observed. These modes and the weak defect activated scattering are used to characterize the Ge layers. These results show that Raman spectroscopy can now be used to directly characterize the properties of buried interfaces at the level of single atomic layers. [ABSTRACT FROM AUTHOR]

The physical and electrical characteristics of gallium (Ga) ion implanted <100> silicon, annealed for times of the order of seconds to several tens of seconds for temperatures in the range of 550–900 °C, are presented. It is shown that for the chosen doses of 1–6×1015/cm2 and energy of 100 keV highly electrically active p-type layers (approaching 100%) can be achieved. The highest activation being reached at temperatures below ∼650 °C with no profile distortion. For temperatures in excess of 800 °C this electrical activation decreases and significant profile movement occurs even for times as short as 2 s. [ABSTRACT FROM AUTHOR]

Describes an ion-cut-silicon-on-insulator wafer fabrication technique with plasma immersion ion implantation (PIII). Relationship between the hydrogen implantation rate and the wafer size; Features of the PIII reactor; Feasibility of the PIII ion-cut process.

Examines the separation of oxygen plasma implantation for silicon-on-insulator wafer fabrication. Role of the silicon-on-insulator devices in the low-power, low-voltage technology; Constraints of the plasma implantation technique; Reasons for the high concentration in the overlayer silicon.

Investigates the fabrication of buried oxide layer in silicon using plasma immersion ion implantation. Presentation of separation by plasma implantation of oxygen (SPIMOX) for silicon-on-insulator manufacturing; Identification of buried oxide microstructure modes in the SPIMOX samples prepared; Dependence of oxide morphology on implantation profile.

Amorphous silicon films, doped with antimony at a relative high concentration of ∼(4–5)×1020 cm-3, were deposited by means of a molecular beam on (100) Si substrates. These films were subsequently heat treated at temperatures between 500 and 700 °C for times between 5 s and 12 h. It was found that at 500 °C the resistivity decreased with time during solid phase epitaxial growth of the amorphous films and induced electrical activation of Sb ‘‘quenched-in’’ the Si. At the higher temperatures, however, after an initial decrease to a minimum value the resistivity increased with the heat treatment time as a result of a precipitation of Sb from the supersaturated crystallized Si films. The times to obtain the minimum values of the resistivity are consistent with the rates of the solid phase epitaxial growth of amorphous Si films on (100) Si given in the literature for the various temperatures. [ABSTRACT FROM AUTHOR]

Single-phase SnxGe1-x alloys with x up to 0.3 have been grown by molecular beam epitaxy. X-ray diffraction measurements indicate the layers to have the diamond crystal structure. The metastability of the alloys is apparent as increases in the growth temperature, layer thickness, or Sn composition cause phase separation of the Sn into a noncubic (white or β-Sn) form. Rutherford backscattering spectrometry and reflection high-energy electron diffraction measurements indicate that the initial stages of growth are complicated. The first several hundred angstroms of growth are compositionally graded, with the Sn incorporation rate increasing with film thickness. Thereafter, the alloy composition remains constant, determined by flux composition, until a critical thickness for phase separation is reached ([bar_over_tilde:_approx._equal_to]2000 Å for x=0.3). [ABSTRACT FROM AUTHOR]

Epitaxial layers of InSb have been grown on Si substrates by molecular beam epitaxy. Room-temperature electron mobilities are 48 000 and 39 000 cm2/V s for 3.2 μm-thick InSb with and without a thin GaAs buffer, respectively. The corresponding carrier concentrations are 2.2×1016 and 2.7×1016 cm-3. A sample with an InSb thickness of 8 μm exhibited room-temperature mobilities as high as 55 000 cm2/V s with carrier concentrations of about 2.0×1016 cm-3. A sharp band-edge transmission spectrum is observed at room temperature for the 8 μm layer. [ABSTRACT FROM AUTHOR]

The structural and electrical properties have been investigated of antimony doped polycrystalline silicon films obtained by molecular beam deposition on oxidized silicon substrates. We show that low-resistivity films with smooth morphology are obtained by solid phase crystallization of antimony doped amorphous silicon layers deposited at 250 °C. A resistivity of 4.3 mΩ cm is obtained by crystallizing the films at temperatures as low as 650 °C for 15 min. In situ crystallization of the amorphous silicon is absolutely necessary to achieve low resistivities. We also show that direct deposition above 650 °C gives rise to polycrystalline silicon with much higher resistivities. [ABSTRACT FROM AUTHOR]

100-μm silicon-on-insulator structures have been achieved by first utilizing silicon molecular beam epitaxial (Si MBE) growth on porous silicon and subsequently oxidizing the porous silicon through the patterned Si MBE film windows. A Si beam method is used for the low-temperature surface cleaning of porous silicon prior to Si MBE growth. By using a two-step growth technique, the Si MBE film shows good crystallinity checked by Rutherford backscattering channeling spectroscopy and cross-sectional transmission electron microscopy. An electron mobility of 1300 cm2 V-1 s-1 with a doping concentration of 6×1015 cm-3 has been achieved. [ABSTRACT FROM AUTHOR]

Two types of growth conditions have been obtained that consistently overcome the formation of epitaxially misoriented grains in CoSi2/Si(001). One is by co-deposition of Co and Si at Co-rich ratios at a substrate temperature of ∼500 °C. This method yields films of low resistivity (16 μΩ cm) and low ion channeling minimum yield (χmin≊2%), but the misfit dislocation densities are of the order of 105 cm-1. The second way uses a template method of growth after an epitaxial Si buffer layer. Films grown this way have somewhat higher resistivities than those grown by the first method, but have lower misfit dislocation densities. The strain relief mechanism in these films also appears to be different from that of co-deposited films. Pinhole densities in films grown by both methods are below our detection limit of 103 cm-2. [ABSTRACT FROM AUTHOR]