Search

A well position-controllable single Ge nanowire array was grown on patterned Au catalysts substrate by low-pressure chemical vapor deposition. Both transmission electron microscope and X-ray diffraction results indicate that Ge nanowires are single crystalline with diamond structure. By optimizing the electron-beam lithography process, Au patterns with a diameter of 10 nm were prepared by lift-off method. The growth of Ge nanowires can be precisely controlled by adjusting the location of catalysts, which may offer the possibility of in situ fabrication of nanowire devices.

We observed the spectrum of quantum levels on series-connected double single-electron transistors (DSETs). The DSETs, composed of double quantum dots are formed with lateral confinements on the silicon-on-insulator substrate. To characterize DSETs, the electrical measurements were carried out at the base temperature of 22 mK by using a dilution refrigerator. The estimated energy spacing from the measurement characteristics agreed with the values from the geometrically defined quantum dots size. These results exhibit the significant potential of DSETs as a readout device for two charge quantum bits (qubits).

We report 350 °C as a critical growth temperature for overcoming the aggregation of gold (Au) in the synthesis of high-density silicon nanowires (SiNWs) with controlled diameters in a vapor–liquid–solid (VLS) mechanism by the low-temperature decomposition of Si2H6. Low-temperature growth is considered essential for preserving the initial distribution of Au droplets (8±5 nm) during SiNW nucleation with small (12 nm) and uniform (±5 nm) diameters. Au–Si eutectics increase in size with aggregation at high temperatures, resulting in SiNWs with large and random diameters. The crystal quality, defect formation, and morphology of the wires, grown in the (111) direction, are size dependent.