1. Interconnect Scheme for Die-to-Die and Die-to-Wafer-Level Heterogeneous Integration for High-Performance Computing
- Author
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Daniel E. Oates, Vladimir Bolkhovsky, Jason J. Plant, Renee D. Lambert, Manuel Docanto, Rabindra N. Das, Ravi Rastogi, Scott Zarr, Terence J. Weir, Dmitri Shapiro, Leonard M. Johnson, and C. Galbraith
- Subjects
Interconnection ,Fabrication ,Materials science ,business.industry ,Coplanar waveguide ,Optoelectronics ,Microelectronics ,Wafer ,business ,Flip chip ,Microstrip ,Die (integrated circuit) - Abstract
Today, microbump-based flip-chip technology is a compelling option for heterogeneous integration in microelectronic packaging. Performance as well as density (smaller form factor) requirements continue to drive smaller, microbump-based, finer pitch interconnections. This paper presents heterogeneous integration based on microbump fabrication, characterization, and integration for fine pitch die-to-die and die-to-wafer flip-chip interconnection. A variety of microbump options including indium, indium-coated gold, gold and gold-on-gold were used for bump bonding of fine pitch flip-chip structures. A series of microbumps (2.5-15µm) were fabricated using contact and non-contact photolithography on superconducting multi-chip module (S-MCM) wafers. The integration process includes various microbump combinations to reduce microbump spreading / flow during the fine-pitch assembly process. In another study, gold-ball-based interconnects were developed to convert wire bondable chips to a flip-chip process. The use of microbumps to form 10µm-pitch flip-chip interconnects and their initial electrical performance are discussed. As a case study, we have developed indium microbump technology capable of interconnecting an array of 10-to-35-µm-pitch pads to a superconducting multi-chip module (S-MCM) fabricated on 200mm silicon wafers. The S-parameters of several back-to-back microstrip and grounded coplanar waveguide (GCPW) transitions were measured and simulated in a 2.5d (planar) full-wave electromagnetic software package (Sonnet em). The flip-chip configurations showed excellent impedance matching and low insertion loss to multi-gigahertz frequencies. For example, a microstrip-to-microstrip transition using 20µm-diameter bumps with 35µm pitch in a coaxial configuration (signal bump surrounded by ground bumps) had a simulated return loss of less than -20 dB from DC to 23 GHz. By adding some compensating inductance to the transitions, this simulated response was extended to 81 GHz. Smaller bump diameter and pitch yields a much better impedance match and less reflected energy, with the 10 µm pitch and 5 µm bump versions giving near-perfect performance to 100 GHz and beyond. Flip-chipped Josephson junctions and niobium lines interrupted by indium microbumps between the superconducting integrated circuits (ICs) and the S-MCM maintained their I-V characteristics. This paper also discusses large superconducting multi-chip module (S-MCM) fabrication and bonding approaches for future technology. Various fabrication options including jumper flip-chip, stitching and laser direct writing are considered for large S-MCM fabrication.
- Published
- 2019