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In this paper a three phase inverter is designed for operating a brushless dc motor. Following the operating principle of a brushless dc motor, required switching is done by a microcontroller (arduino uno). Necessary gate driver circuit is also designed for proper operation of the inverter. The practical result matches with the simulation result and the motor runs successfully.

Pure BiFeO 3 nanoparticles were synthesized by a simple sol-gel method namely modified Pechini method. The nanoparticles were calcinated at four different temperatures (450°C, 550°C, 650°C, 750°C). Requirement for extra washing step for impurity phase reduction has been eliminated by elongation of the drying duration at oven from 12 hours to 28 hours along with intermediate grinding. FESEM and X-ray Diffraction (XRD) were performed which confirm that the samples calcinated at 450°C and 550°C show smaller particle size and greater correspondence. Hence XPS was performed on these two samples which showed lower oxygen vacancies for 550°C. Finally the SQUID analysis has been carried out for the 550°C sample. A higher value of remanent magnetization and coercive field at room temperature has been observed. Besides, an asymmetric shift in the field axis with unsaturated M-H curve may be attributed to the existence of exchange bias effect in the synthesized nanoparticles.

In this work, effect of interface charge on the performance of a Dual Material Double Gate (DMDG) Tunnel Field Effect Transistor (TFET) device has been studied. Due to the presence of high electric field in the device, interface charges are generated at oxide-semiconductor interface by hot carrier effect. A 2-D model of the device with interface charge has been developed in TCAD simulator and impact of both positive and negative interface charges has been observed in potential distribution, band profile, carrier concentration, tunneling current and threshold voltage. Since high electric field mainly exists in the source-body junction of the device, interface charges are mainly localized at that region. Effect of localized charge spreading over varying length has also been analyzed on surface potential and threshold voltage of the device. The study will be useful in fabrication and application of DMDG TFET devices.

In this paper, an analytical model has been developed for the vacuum field-effect transistor (VFET). Mathematical expressions for drive in voltage and current has been derived. A drive in voltage has been modeled based on minimum current density for space charge limited emission. Analytical model of the channel current incorporates the device operating physics such as space charge limited emission and Fowler-Nordheim tunneling. The analytical model has been numerically verified with the practical data available. Proposed model provides the opportunity to evaluate the vacuum device characteristics and determine the future projections as well.

A modified multilevel inverter (MLI) structure has been presented for Photovoltaic (PV) fed 2.3 kV micro-grid applications. To feed the cascaded multilevel micro-grid connected inverter (CM-MGCI) voltage, a PV array is designed considering the environmental effects of Bangladesh. We have estimated the performance of the classical and a modified cascaded H-bridge (CHB) MLI with level-shifted carrier sinusoidal pulse width modulation (LSC-SPWM) technique in MATLAB/Simulink environment. The voltage and total harmonic distortion (THD) profile for the proposed eleven-level modified H-bridge MLI topology has been compared with the conventional CHB topology. The harmonic profile has also been compared with other modified MLI topologies. Compared to the conventional CHB and other recent modified MLI topologies, the proposed H-bridge CM-MGCI shows better THD profile.

The impact of inversion charge layer on triple material double gate (TMDG) Tunnel FET (TFET) has been inspected in this work by using 2D TCAD simulations. Simulation results show that band-to-band tunneling current saturates due to inversion layer formation. Inversion charges cause the pinning of surface potential and make drain current less responsive to gate voltage. The contribution of source and drain in forming the inversion layer is measured quantitatively. The influence of different device parameters on inversion layer formation has also been inspected.

In this study, a modified carrier is proposed to generate PWM gating signal. Proposed PWM method reduces total harmonic distortion (THD) of the output voltage of inverter up to 5.8% than the traditional triangular carrier based PWM. Major harmonic components in output voltage are less in magnitude when proposed PWM technique is applied to inverter. Fundamental component of output voltage is also higher in proposed PWM method for all modulation index and frequency ratio. Performance of proposed modified carrier based PWM is evaluated by MATLAB simulation for single phase 4-cells 9-levels cascaded H-bridge MLI.

A fast power flow control algorithm for a grid tie Photovoltaic inverter is presented here. The proposed method has the merits of design simplicity. The algorithm is fast and has the virtue of quick response to the change of required power output for the PV inverter. Current mode asynchronous sigma delta modulation is implemented to ease the controlled sensitivity to the grid current distortion. This process also opens a window to reduce the harmonics in the current. The simulation is performed in MATLAB/Simulink. A comparison is provided to observe the response behaviour of the algorithm.