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Your search keyword '"Fabrice Nemouchi"' showing total 2 results
Start Over Author "Fabrice Nemouchi" Journal 2014 ieee international electron devices meeting
2 results on '"Fabrice Nemouchi"'

1. New insights on bottom layer thermal stability and laser annealing promises for high performance 3D VLSI

Author

S. Chhun, R. Kachtouli, B. Mathieu, F. Aussenac, X. Garros, M. Casse, M.-P. Samson, A. Laurent, J.P. Barnes, L. Pasini, C. Reita, E. Richard, Claire Fenouillet-Beranger, M. Vinet, E. Petitprez, N. Guillot, Pascal Besson, Bernard Previtali, Fabrice Nemouchi, Perrine Batude, Pierre Perreau, V. Benevent, I. Toque-Tresonne, D. Barge, Laurent Brunet, Karim Huet, Sebastien Kerdiles, G. Druais, F. Deprat, H. Dansas, D. Lafond, V. Lu, and N. Rambal

Subjects
Very-large-scale integration, Materials science, business.industry, Doping, Transistor, Laser, law.invention, chemistry.chemical_compound, chemistry, law, MOSFET, Silicide, Electronic engineering, Optoelectronics, Thermal stability, Metal gate, business
Abstract

For the first time the maximum thermal budget of in-situ doped source/drain State Of The Art (SOTA) FDSOI bottom MOSFET transistors is quantified to ensure transistors stability in Sequential 3D (CoolCube™) integration. We highlight no degradation of Ion/Ioff trade-off up to 550°C. Thanks to both metal gate work-function stability especially on short devices and silicide stability improvement, the top MOSFET temperature could be relaxed up to 500°C. Laser anneal is then considered as a promising candidate for junctions activation. Based on in-depth morphological and electrical characterizations it demonstrates very promising results for high performance Sequential 3D integration.

Published
2014
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2. Future challenges and opportunities for heterogeneous process technology. Towards the thin films, Zero Intrinsic Variability devices, Zero Power era

Author

Louis Hutin, Simon Deleonibus, Herve Fanet, François Bertin, Thomas Ernst, S. Tedesco, Francois Andrieu, Sébastien Barnola, Perrine Batude, O. Cueto, A. Villalon, D. Gasparutto, Edith Beigne, Xavier Jehl, Raluca Tiron, Christophe Poulain, Thomas Signamarcheix, Julien Arcamone, Y. Lamy, David K. C. Cooper, G. Poupon, Fabrice Nemouchi, Nicolas Posseme, B. De Salvo, X. Baillin, M. Vinet, L. Perniola, Laurent Pain, M. Sanquer, E. Vianello, Olivier Weber, C. Le Royer, O. Faynot, L. DiCioccio, François Martin, Laurent Duraffourg, Hubert Moriceau, H. Okuno, and R. Salot

Subjects
CMOS, business.industry, Computer science, Electrical engineering, Electronic engineering, Process (computing), Linear scale, Maximization, Thin film, business, Power (physics), Zero (linguistics), Efficient energy use
Abstract

Linear scaling CMOS has encountered many hurdles which request new process modules, driven mainly by the maximization of energy efficiency. Fabrication at the sub 10nm node level will request Intrinsic Variability approaching to zero. The rapid growth of mobile, multifunctional and autonomous systems is hardly demanding to reach Zero Power consumption. The solutions to integrate Thin Film based devices, architectures and systems in order to face these challenges are described.

Published
2014
Full Text
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