1. A common architecture for co-simulation of SystemC models in QEMU and OVP virtual platforms
- Author
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Filippo Cucchetto, Alessandro Lonardi, and Graziano Pravadelli
- Subjects
Engineering ,business.industry ,HW/SW co-simulation ,Co-simulation ,Port (computer networking) ,Computer architecture ,SystemC ,Embedded system ,Virtual prototyping ,Architecture ,Virtual platform ,business ,Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION ,computer ,computer.programming_language - Abstract
Several approaches have been proposed for cosimulation between QEMU and SystemC. On the contrary, no paper addresses integration between Open Virtual Platform (OVP) and SystemC. Indeed, OVP models and the related simulator can be integrated into SystemC designs by using TLM 2.0 wrappers and opportune OVP APIs. However, this solution presents some disadvantages, like the incapability of supporting cycle-accurate models, and the necessity of re-design, in terms of SystemC modules, all OVP components that should be integrated in the target platform. To avoid such drawbacks, and provide an easy way to port SystemC models from a QEMU-based to an OVP-based virtual platform and vice versa, this paper presents a common co-simulation approach that works for integrating SystemC components with both QEMU and OVP. more...
- Published
- 2014
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