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Start Over Author "Spyridon Skordas" Journal 2013 ieee soi-3d-subthreshold microelectronics technology unified conference (s3s)
1 results on '"Spyridon Skordas"'

1. Three-dimensional wafer stacking using Cu TSV integrated with 45nm high performance SOI-CMOS embedded DRAM technology

Author

Kevin R. Winstel, Ben Himmel, Deepika Priyadarshini, Tuan Vo, Kristian Cauffman, Alex Hubbard, B. Peethala, Pooja R. Batra, Wei Lin, John W. Golz, Norman Robson, Gary W. Maier, Chandrasekharan Kothandaraman, Douglas Charles Latulipe, Bishan He, Spyridon Skordas, Deepal Wehella Gamage, Troy L. Graves-Abe, John E. Barth, Subramanian S. Iyer, and Toshiaki Kirihata

Subjects
Interconnection, Materials science, Wafer bonding, Hardware_INTEGRATEDCIRCUITS, Electronic engineering, Silicon on insulator, Wafer, Hardware_PERFORMANCEANDRELIABILITY, Cache, Integrated circuit design, eDRAM, Dram
Abstract

For high-volume production of 3D-stacked chips with through-silicon-via (TSVs), wafer-scale bonding offers lower production cost compared with bump bond technology [1][2][3] and is promising for interconnect pitch

Published
2013
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