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For the first time, Ge CMOS with all thermal processes performed by microwave annealing (MWA) has been realized. The full MWA process is under 390 oC. It significantly outperforms conventional rapid thermal annealing (RTA) process in 3 aspects: (1) Diffusion-less junction: for easily diffused n-type dopant, phosphorous (P), the ion implantation dopant profile after the MWA activation process remains unchanged. (2) Increased C ox and lower gate leakage: the low temperature activation process leads to less Ge out-diffusion during MWA than RTA, suppressing the degradation of gate dielectric/ Ge channel interface. (3) Ultrathin 7.5nm Ni mono-germanide with low sheet resistance (Rs) and contact resistivity: after two-step MWA, a thin mono-NiGe layer was obtained which has larger crystallite size to lower Rs. Ge n- and p-MOSFET were also demonstrated. Compared to conventional RTA, the MWA gives 50% and 24% drive current enhancement for p- and n-MOSFET, respectively. These data show that the low temperature MWA is a very promising thermal process technology for Ge CMOS manufacturing.

Due to the highest electron mobility (2200 cm2/Vs) on (111) Ge surface, the n-channel triangular Ge gate-all-around (GAA) FET with (111) sidewalls on Si and L g =350 nm shows 2x enhanced I on of 110 μA/μm at 1V with respect to the devices with near (110) sidewalls. A novel process to etch away the defective Ge near Ge/Si interface from epitaxial Ge grown on SOI achieves a nearly defect-free channel, good gate control triangular gate, and larger effective width. Electrostatic control of SS= 94 mV/dec (at 1V) can be further improved if superior gate stack than EOT= 5.5 nm and D it = 1×1012 cm−2eV−1 is used. The I on can be further enhanced if the line edge roughness (LER) can be reduced. The Ge GAA n-FET is reported for the first time with CMOS compatible process, which makes the circuits integration much easier.