1. High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond
- Author
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M. Hatzistergos, Christian Pacha, Haoren Zhuang, Melanie J. Sherony, Yong Meng Lee, T.J. Tang, S. Han, S. Samavedam, Jens Haetty, Sun-OO Kim, Martin Ostermayr, R. Divakaruni, V.-Y. Theon, Weipeng Li, Kenneth J. Stein, Michael P. Chudzik, Haizhou Yin, X. Chen, Richard Lindsay, J.-P. Han, M. Chowdhury, Jaeger Daniel, Naim Moumen, Dae-Gyu Park, Nam-Sung Kim, Kisang Kim, Manfred Eller, Dominic J. Schepis, Rainer Loesing, Mukesh Khare, J. Chen, K. von Arnim, An L. Steegen, Thomas S. Kanarsky, Vijay Narayanan, W. Yan, and Klaus Schruefer
- Subjects
Engineering ,Analogue electronics ,business.industry ,Electrical engineering ,Hardware_PERFORMANCEANDRELIABILITY ,law.invention ,Microprocessor ,CMOS ,law ,Logic gate ,Low-power electronics ,Hardware_INTEGRATEDCIRCUITS ,Electronic engineering ,Static random-access memory ,business ,Metal gate ,Electronic circuit - Abstract
This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in PFET drive current when compared with industry standard 45nm Poly/SiON devices. No additional stress elements were used for this performance gain. The critical path circuits of this low power microprocessor built with HK/MG show dynamic performance gain over 50% at same supply voltage and 36% lower dynamic energy at same performance. Superior SRAM minimum operating voltage characteristics are achieved due to Vt variability reduction from HK/MG. Analog circuit functionality is demonstrated by a fully integrated PLL circuitry without any modification to process.
- Published
- 2009
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