52 results on '"Shamiryan, D."'
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2. Wafer Backside Cleaning Strategies for High-k/Metal Gate Processing
3. Russian MEMS production of European quality
4. Interprocess control of critical dimensions in production of MEMS
5. Automated defect detection system in MEMS manufacturing
6. Revealing the Porous Structure of Low-k Materials Through Solvent Diffusion
7. Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques
8. Integrated diffusion–recombination model for describing the logarithmic time dependence of plasma damage in porous low-k materials
9. Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques
10. In-line control of Si loss after post ion implantation strip
11. Charging of submicron structures during silicon dioxide etching in one- and two-frequency gas discharges
12. 8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS
13. Improving mechanical robustness of ultralow-k SiOCH plasma enhanced chemical vapor deposition glasses by controlled porogen decomposition prior to UV-hardening
14. Effect of energetic ions on plasma damage of porous SiCOH low-k materials
15. Effect of top power on a low-k film during oxygen strip in a TCP etch chamber
16. Charging and the secondary electron–electron emission on a trench surface: broadening and shift of ion energy spectrum at plasma trench etching
17. Metrology for Implanted Si Substrate Loss Studies
18. Effects of He Plasma Pretreatment on Low-k Damage during Cu Surface Cleaning with NH[sub 3] Plasma
19. The metal hard-mask approach for contact patterning
20. Experimental and Theoretical Studies of Radical Production in RF CCP Discharge at 81-MHz Frequency in $\hbox{Ar/CF}_{4}$ and $\hbox{Ar/CHF}_{3}$ Mixtures
21. SELECTIVE REMOVAL OF HIGH-KGATE DIELECTRICS
22. Plasma etching: From micro- to nanoelectronics
23. High Performance 70-nm Germanium pMOSFETs With Boron LDD Implants
24. Dry etching process for bulk finFET manufacturing
25. Record ION/IOFF performance for 65nm Ge pMOSFET and novel Si passivation scheme for improved EOT scalability
26. Oxygen chemiluminescence in He plasma as a method for plasma damage evaluation
27. Effect of quartz window temperature on plasma composition during STI etch
28. Using Ellipsometry for Assessment of TiN Surface Roughness after Plasma Etch
29. Diffusion of solvents in thin porous films
30. Spacer defined FinFET: Active area patterning of sub-20nm fins with high density
31. Metal Inserted Poly-Si (MIPS) and FUSI dual metal (TaN and NiSi) CMOS integration
32. Influence of crystallographic orientation on dry etch properties of TiN
33. Influence of TaN Gate Electrode Microstructure on Its Dry Etch Properties
34. Implementation of high-k and metal gate materials for the 45nm node and beyond: gate patterning development
35. Integration challenges for multi-gate devices
36. Highly Sensitive Monitoring of Ru Etching Using Optical Emission
37. Low-k dielectric materials
38. Growth and characterization of atomic layer deposited WC0.7N0.3 on polymer films
39. Pinhole density measurements of barriers deposited on low-k films
40. Simulations of diffusion barrier deposition on porous low-k films
41. Low dielectric constant materials for microelectronics
42. Diffusion barrier integrity evaluation by ellipsometric porosimetry
43. Investigation of barrier and slurry effects on the galvanic corrosion of copper
44. Comparative study of PECVD SiOCH low-k films obtained at different deposition conditions
45. Factors affecting an efficient sealing of porous low-kdielectrics by physical vapor deposition Ta(N) thin films
46. Comparative study of SiOCH low-k films with varied porosity interacting with etching and cleaning plasma
47. Controlling STI-related Parasitic Conduction in 90 nm CMOS and Below
48. Optimization of etching and stripping chemistries for Z3MS/sup TM/ Low-k
49. Characterization of Cu surface cleaning by hydrogen plasma
50. Controllable Change of Porosity of 3-Methylsilane Low-k Dielectric Film
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