537 results on '"Luk, Wayne"'
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2. Hardware-Aware Optimizations for Deep Learning Inference on Edge Devices
3. Light-Weight Permutation Generator for Efficient Convolutional Neural Network Data Augmentation
4. LL-GNN: Low Latency Graph Neural Networks on FPGAs for High Energy Physics
5. High-Frequency Financial Market Simulation and Flash Crash Scenarios Analysis: An Agent-Based Modelling Approach
6. Low Latency Variational Autoencoder on FPGAs
7. Efficiently Removing Sparsity for High-Throughput Stream Processing
8. Advancements in spiking neural network communication and synchronization techniques for event-driven neuromorphic systems
9. Deeper Hedging: A New Agent-based Model for Effective Deep Hedging
10. Special Issue: “AI Acceleration on FPGAs”
11. Exploring Machine Learning Adoption in Customisable Processor Design
12. FPGA-Accelerated Causal Discovery with Conditional Independence Test Prioritization
13. MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Acceleration
14. Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks
15. Accelerating 4D image reconstruction magnetic resonance-guided radiotherapy
16. Heterogeneous Reconfigurable Accelerators: Trends and Perspectives
17. When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA
18. Co-Design of Algorithm and FPGA Accelerator for Conditional Independence Test
19. Extensible Embedded Hardware Description Languages with Compilation, Simulation and Verification
20. Customisable Processing of Neural Networks for FPGAs
21. Distributed large-scale graph processing on FPGAs
22. Optimizing CNN-Based Hyperspectral Image Classification on FPGAs
23. Experimental survey of FPGA-based monolithic switches and a novel queue balancer
24. Using Agent-Based Modelling to Evaluate the Impact of Algorithmic Curation on Social Media
25. Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks
26. Event‐based high throughput computing: A series of case studies on a massively parallel softcore machine
27. Accelerating Transformer Neural Networks on FPGAs for High Energy Physics Experiments
28. FPGA-Based Acceleration for Bayesian Convolutional Neural Networks
29. Accelerating Bayesian Neural Networks via Algorithmic and Hardware Optimizations
30. Correlation Coefficient Based Cluster Data Preprocessing and LSTM Prediction Model for Time Series Data in Large Aircraft Test Flights
31. Reconfigurable Hardware Generation for Tensor Flow Models of CNN Algorithms on a Heterogeneous Acceleration Platform
32. Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design
33. dfesnippets: An Open-Source Library for Dataflow Acceleration on FPGAs
34. In-Circuit Assertions and Exceptions for Reconfigurable Hardware Design
35. Optimizing CNN-Based Object Detection Algorithms on Embedded FPGA Platforms
36. Custom Framework for Run-Time Trading Strategies
37. Advances in Dataflow Systems
38. Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs
39. Optimizing Graph Neural Networks for Jet Tagging in Particle Physics on FPGAs
40. A Unified Approach for Managing Heterogeneous Processing Elements on FPGAs
41. POLSCA: Polyhedral High-Level Synthesis with Compiler Transformations
42. Enabling fast uncertainty estimation
43. Optimizing quantum circuit placement via machine learning
44. Custom Instructions for Networked Processor Templates
45. Reconfigurable Acceleration of Graph Neural Networks for Jet Identification in Particle Physics
46. Verifying Hardware Optimizations for Efficient Acceleration
47. Non-deterministic event brokered computing
48. Meta-Programming Design-Flow Patterns for Automating Reusable Optimisations
49. Customizable FPGA-based Accelerator for Binarized Graph Neural Networks
50. Maximising Parallel Memory Access for Low Latency FPGA Designs
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