25 results on '"Krauss, Tillmann"'
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2. From MOSFETs to Ambipolar Transistors: Standard Cell Synthesis for the Planar RFET Technology
3. Towards Ambipolar Planar Devices: The DeFET Device in Area Constrained XOR Applications
4. From MOSFETs to Ambipolar Transistors: A Static DeFET Inverter Cell for SOI
5. Process and Device Simulation of Schottky Barrier MOSFETs for Analysis of Current Injection
6. Reconfigurable electrostatically doped 2.5-gate planar field-effect transistors for dopant-free CMOS
7. On the Physical Behavior of Cryogenic IV and III–V Schottky Barrier MOSFET Devices
8. Simulation framework for barrier lowering in Schottky barrier MOSFETs
9. Fabrication and simulation of electrically reconfigurable dual metal-gate planar field-effect transistors for dopant-free CMOS
10. Favorable Combination of Schottky Barrier and Junctionless Properties in Field-Effect Transistors for High Temperature Applications
11. Evaluation of Different High Κ Materials for In situ Growth of Carbon Nanotubes
12. Electrically reconfigurable dual metal-gate planar field-effect transistor for dopant-free CMOS
13. Electrostatically Doped Planar Field-Effect Transistor for High Temperature Applications
14. An electrostatically doped planar device concept
15. Simulation and experimental verification: Dopant-free Si-nanowire CMOS technology on silicon-on-insulator material
16. Reconfigurable CMOS with undoped silicon nanowire midgap Schottky-barrier FETs
17. Dopant-Free CMOS on SOI: Multi-Gate Si-Nanowire Transistors for Logic and Memory Applications
18. Dopant-free CMOS: A new device concept
19. Damascene TiN–Gd2O3-gate stacks: Gentle fabrication and electrical properties
20. CMOS without doping: Midgap Schottky-barrier nanowire field-effect-transistors for high-temperature applications
21. Novel Application of Wafer-Bonded MultiSOI: Junctionless Nanowire Transistors for CMOS Logic
22. Dopant-independent and voltage-selectable silicon-nanowire-CMOS technology for reconfigurable logic applications
23. Novel Application of Wafer-Bonded MultiSOI: Junctionless Nanowire (NW) Transistors for CMOS Logic
24. Dopant free multi-gate silicon nanowire CMOS-inverter on SOI substrate
25. Damascene metal gate technology for damage-free gate-last high-k process integration
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