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A spectroscopic ellipsometry (SE) model was developed and implemented to study substrate loss in shallow implanted silicon (i-Si) substrates following a photoresist strip. The model is based on different optical properties of silicon dioxide (SiO2)and i-Si layers and silicon substrates and is used to characterize relevant layers, i-Si and SiO2, before and after plasma treatment. An increase in SiO2and a decrease in the i-Si layer were observed after plasma exposure. Changes in the i-Si layer are the result of two phenomena, oxidation and heating-induced regrowth of the i-Si layer, while changes in the SiO2thickness represent the direct measure of substrate loss due to oxidation. Transmission electron microscopy (TEM) and secondary-ion mass spectrometry (SIMS) analysis were performed to cross-check the validity and accuracy of the SE model. The TEM results confirm that the SE model can distinguish between a crystalline (c-Si) substrate and an i-Si layer regardless if the i-Si is damaged, crystalline, or amorphized. There is also good consistency between the SE and SIMS results. For the plasma processes studied in this work, minimal changes in layer thicknesses and substrate losses measured by SE agree very well with the measured SIMS dopant profiles.

In this study, the effect of the sequential He and NH3plasma treatments on a chemical vapor deposition SiOC:H low-kdielectric is evaluated in the wide range of experimental conditions. Results show that the active NH3plasma radicals penetrate the porous low-kbulk and remove the hydrophobic Si–CH3groups, which leads to hydrophilization and results in the degradation of dielectric properties. The implementation of He plasma pretreatment reduces the damage imposed by the NH3plasma by a stimulation of the surface recombination of active radicals from NH3plasma. He plasma causes a surface modification of 10–20 nm presumably due to the energy transfer from the extreme UV photons and the 21SHemetastable atoms to the low-kstructure. The plasma damage reduction is proportional to He plasma density and the treatment time. The mechanism of plasma damage reduction is explained on the basis of the Knudsen diffusion mechanism and random walk theory.

In this paper we demonstrate the successful integration of in-situ doped embedded Si:C stressors epitaxially grown in the source and drain areas of nMOS devices using a novel Cyclic Deposition Etch (CDE) process. These layers have substitutional C content ranging between 1% and 2% with potential of achieving even higher substitutional carbon concentration. Another distinctive feature of this process is that it allows for high in-situ P doping for ease of integration within a CMOS platform. We demonstrate superior performance of strained nMOS devices with embedded Si:C showing up to 12.5% on-state current improvement over the unstrained reference process. We report on material characterization results of embedded Si:C stressors, in particular, strain retention properties as a function of subsequent post-epitaxy processing.

Titanium nitride (TiN) is widely used in metal gate applications. Exposing TiN to a Cl2∕HBrplasma results in pronounced surface roughness that can be easily characterized by ellipsometry. The ellipsometric angle Δ is proportional to the roughness if the roughness does not exceed 30nm. It is possible to plot a “roughness diagram” where a border can be drawn between the smooth and rough etch surfaces depending on the etch conditions. This diagram could be used for gate-etch process optimization. In our case, the roughness could be overcome by increasing HBr content and/or substrate bias during the etching.

The etch properties of physical vapor deposited TaNused as a metal gate electrode have been found to be dependent on its crystalline microstructure. As found by X-ray diffraction, the initially amorphous TaNcrystallizes at temperatures above 500°C. The crystallization results in lower resistivity (decreased by 13%), and lower etch rate in BCl3plasma (decreased by 24%). The different crystalline microstructure can manifest itself in different etch results when the same etch process is applied for gate stacks that contain the same TaNbut were subjected to different thermal budget.