46 results on '"Manghisoni, M."'
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2. 28 nm CMOS analog front-end channels for future pixel detectors
3. Cosmic antihelium-3 nuclei sensitivity of the GAPS experiment
4. Threshold tuning DACs for pixel readout chips at the High Luminosity LHC
5. A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion
6. The PixFEL project: Progress towards a fine pitch X-ray imaging camera for next generation FEL facilities
7. Design and test of clock distribution circuits for the Macro Pixel ASIC
8. In-pixel conversion with a 10 bit SAR ADC for next generation X-ray FELs
9. Characterization of bandgap reference circuits designed for high energy physics applications
10. PixFEL: developing a fine pitch, fast 2D X-ray imager for the next generation X-FELs
11. Advantages of a vertical integration process in the design of DNW MAPS
12. Vertically integrated monolithic pixel sensors for charged particle tracking and biomedical imaging
13. Thin pixel development for the SuperB silicon vertex tracker
14. The S uperB silicon vertex tracker
15. Beam test results of different configurations of deep N-well MAPS matrices featuring in pixel full signal processing
16. Deep n-well MAPS in a 130 nm CMOS technology: Beam test results
17. Vertically integrated deep N-well CMOS MAPS with sparsification and time stamping capabilities for thin charged particle trackers
18. Introducing 65 nm CMOS technology in low-noise read-out of semiconductor detectors
19. The SLIM5 low mass silicon tracker demonstrator
20. The superB silicon vertex tracker
21. The high rate data acquisition system for the SLIM5 beam test
22. Beam-test results of 4k pixel CMOS MAPS and high resistivity striplet detectors equipped with digital sparsified readout in the Slim5 low mass silicon demonstrator
23. Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier
24. A 3D deep n-well CMOS MAPS for the ILC vertex detector
25. SLIM5 beam test results for thin striplet detector and fast readout beam telescope
26. A 4096-pixel MAPS device with on-chip data sparsification
27. Design and TCAD simulation of planar p-on-n active-edge pixel sensors for the next generation of FELs
28. Recent developments in 130 nm CMOS monolithic active pixel detectors
29. 130 and 90 nm CMOS technologies for detector front-end applications
30. Pixel-level continuous-time analog signal processing for 130 nm CMOS MAPS
31. First prototype of a silicon microstrip detector with the data-driven readout chip FSSR2 for a tracking-based trigger system
32. Development of deep N-well monolithic active pixel sensors in a [formula omitted] CMOS technology
33. Total Ionizing Dose effects in 130-nm commercial CMOS technologies for HEP experiments
34. A new approach to the design of monolithic active pixel detectors in [formula omitted] triple well CMOS technology
35. Monolithic pixel detectors in a [formula omitted] CMOS technology with sensor level continuous time charge amplification and shaping
36. A novel monolithic active pixel detector in [formula omitted] triple well CMOS technology with pixel level analog processing
37. The readout of the LHC beam luminosity monitor: accurate shower energy measurements at a [formula omitted] repetition rate
38. Gamma-ray response of SOI bipolar junction transistors for fast, radiation tolerant front-end electronics
39. Recent results from the development of silicon detectors with integrated electronics
40. A study for the detection of ionizing particles with phototransistors on thick high-resistivity silicon substrates
41. JFET preamplifiers with different reset techniques on detector-grade high-resistivity silicon
42. Resolution limits achievable with CMOS front-end in X- and γ-ray analysis with semiconductor detectors
43. Design and characterization of integrated front-end transistors in a micro-strip detector technology
44. Low-noise design criteria for detector readout systems in deep submicron CMOS technology
45. Feasibility studies of microelectrode silicon detectors with integrated electronics
46. Erratum to: “Low-noise design criteria for detector readout systems in deep submicron CMOS technology”: [Nucl. Instr. and Meth. A 478 (2002) 362–368]
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