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Micro-scale thin-walled parts have the characteristics of small size and low rigidity, so chatter is very easy to occur in high speed micro-milling, which influences machining precision and surface quality of the parts. To solve this problem, the authors first establish micro-milling force models in micro-milling thin-walled parts that consider the elastic deflection of both thin-walled part and micro-milling tool. According to the Lagrange’s equation, the dynamic characteristics of thin-walled part that vary with the cutting position of the tool are obtained combined with the Rayleigh-Ritz method. The relative transfer function between the micro-milling tool and the thin-walled part is achieved through the relationship between cutting force and vibration vector and then the dynamic characteristics of the system are obtained. Finally, the stability lobe diagram is drawn through time-domain simulation and verified by micro-milling experiments. The comparison results show that the prediction results of the stability lobe diagram are consistent with the experimental results. The research is a meaningful exploration of the mechanism of micro-milling thin-walled parts and provides a basis for the selection of cutting parameters for stable cutting.

In this paper, a novel repetitive frequency square-wave generator named pulse forming line-based repetitive square-wave generator (PFLRSG)-based coaxial pulse forming lines (PFLs) and coupled magnetic switches (MSs) is proposed. The generator is capable of amplitude multiplication, high-frequency operation, and rise-time compression. The operation principle is to charge PFLs in parallel via coupled inductors when MSs are unsaturated and discharge in series when MSs saturate to form square-wave voltage pulses across the matched load, with the common diode arrays as the last stage to sharpen the rise-time. The amplitude of the output pulse is dependent on the charging voltage and impedance matching between the PFLs and the load. The pulsewidth is determined by the transmission time of the PFLs. With the principle, circuit topology of a two-stage PFLRSG is presented. Test stand yields an output square-wave pulse with frequency of 1–10 kHz, amplitude of 8.6 kV, rise-time of 60 ns, and half width of 500 ns into a 150- \(\Omega \) matched load. Furthermore, design rules are proposed so that topologies of PFLRSGs with stages other than two can be conveniently derived. As an example, a 4-stage PFLRSG is proposed.