Search

Modification of chemical vapor deposition low-k films upon sequential exposure to helium plasma and then ammonia plasma is characterized using various methods. The He plasma emits extreme ultraviolet (EUV) photons creating O-2 vacancies, which impacts surface reactive sites and induces localized chemical modifications in the first surface monolayers. The subsequent NH3 plasma treatment provides complete sealing of the low-k surface. The depth of the modification, which is a factor of merit of the sealing process, is limited because of the high absorption coefficient of silica-based low-k materials in the range of EUV emission. (C) 2007 The Electrochemical Society. ispartof: Electrochemical and Solid-State Letters vol:10 issue:10 status: published

In this paper key design issues and considerations of a low-cost 3-D Cu-TSV technology are investigated. The impact of TSV on BEOL interconnect reliability is limited, no failures have been observed. The impact of TSV stress on MOS devices causes shifts, further analysis is required to understand their importance. Thermal hot spots in 3-D chip stacks cause temperature increases three times higher than in 2-D chips, necessitating a careful thermal floorplanning to avoid thermal failures. We have monitored for ESD during 3-D processing and have found no events take place, however careful further monitoring is required. The noise coupling between two tiers in a 3-D chip-stack is 20 dB lower than in a 2-D SoC, opening opportunities for increased mixed signal system performance. The impact on digital circuit performance of TSVs is accurately modeled with the presented RC model and digital gates can directly drive signals through TSVs at high speed and low power. Experimental results of a 3-D Network-on-Chip implementation demonstrate that the NoC concept can be extended from 2-D SoC to 3-D SoCs at low area (0.018 ) and power (3%) overhead.