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High temperature and long-time solid-liquid diffusion bonding (SLID) will barrier the scaling down of multi-chip interconnection and increase the total time of 3D integration. A wafer-level temperature gradient bonding technology (TGB) was used in the Au/Sn SLID bonding to lower the temperature and shorten the bonding time. Au/Sn bonding with different pad sizes were designed. The results showed that the Au/Sn bump with different pad size effectively reduce the Sn overflow than that with same pad size. In addition, suitable electroplating current density could lower the Au bump surface roughness and evaporation process could also make Sn flat. With all these optimized design, the bonding was successfully achieved in a vacuum bonding chamber. The hot end temperature was set to 250°C and the cold end temperature was set to 150 °C with the bonding pressure of 5000 N. The bonding condition was maintained for 20 minutes. Then X-ray detection, shearing test and scanning electron microscope (SEM) were used to study the quality of the bonding interface and the overflow of Sn. Misalignment was not detected based on the wafer-level and chip-level X-ray. The chips in the middle of the bonded wafer had a higher shear force compared to the surrounding part of the wafer. SEM images indicated the fracture all occurred on the grain boundary and no dimple were founded. Daisy chain structure were observed when the cross sectional image of the bonded chip was detected.

OBJECTIVE: Providing soft tissue coverage for finger neurocutaneous defects presents aesthetic and sensory challenges. A common source for reconstruction of soft tissue defects of the fingers is the same finger. However, when the donor areas are damaged by concomitant injuries, this option is not available. The present study aims to reconstruct finger neurocutaneous defects using a sensory reverse dorsal digital artery flap from the neighboring digit and to evaluate the efficacy of this technique. METHODS: The study included 16 patients, with an average age of 34.9 years (range, 20–53 years) at the time of surgery, from May 2010 to June 2013. The sensory reverse dorsal digital artery flap was used in all 16 patients, who had a combination of soft tissue and digital nerve defects. The mean size of the soft tissue defects was 3.1 cm × 2.0 cm, and the mean flap size was 3.3 cm × 2.2 cm. The length of the nerve defects ranged from 1.3 to 2.5 cm (mean, 2.0 cm), which were reconstructed with dorsal branches of the proper digital nerve transfer. The active motion of the fingers (injured and donor) and the flap sensibility (static two‐point discrimination) were measured. The appearance and functional recovery of the injured finger and the donor site were assessed using the Michigan Hand Outcomes Questionnaire. RESULTS: All flaps survived completely. No complications were reported, and no further flap debulking procedure was required. At the mean follow‐up period of 24 months (range, 18–30 months), the mean static two‐point discrimination was 6.5 mm (range, 5–10 mm) of the reconstructed area; the mean ranges of motions of the injured finger and the opposite finger at the proximal interphalangeal and distal interphalangeal joints were 102.2° and 103.5°, and 70.3° and 76.5°, respectively. The average ranges of motions of the metacarpophalangeal and proximal interphalangeal joints of the donor fingers were 90° and 103.4°, respectively. Based on the Michigan Hand Outcomes Questionnaire, 10 patients were strongly satisfied and 6 were satisfied with the functional recovery of the injured finger; however, 13 patients were strongly satisfied and 3 were satisfied with the appearance of the injured finger. CONCLUSION: The sensory reverse dorsal digital artery flap from the neighboring digit, based on the dorsal branch of the digital artery, is an effective and additional option for finger neurocutaneous defect reconstruction when use of the local and regional flaps is not feasible.

Charge trapping characteristics of the metal-insulator-silicon (MIS) capacitors with SiO2/HfO2/Al2O3 stacked dielectrics are investigated for memory applications. A capacitance-voltage hysteresis memory window as large as 7.3 V is achieved for the gate voltage sweeping of ± 12 V, and a flat-band voltage shift of 1.5 V is observed in terms of programming under 5V and 1 ms. Furthermore, the time- and voltage-dependent charge trapping characteristics are also demonstrated, the former is related to charge trapping saturation and the latter is ascribed to variable tunnelling barriers for electron injecting and discharging under different voltages.

In the three-level Λ-type and V-type systems, we find that the same pump-effect parameter R = 2|Vc|2γ/((ωac−ωc)2+γ2) determines the population distributions, while the probe field leads to population fluctuations near the absorption peaks. With the increasing of the relaxation rate γ, the population distributions are shifted and their fluctuation amplitudes decrease. At the same time the electromagnetically induced transparency window becomes a broadened absorption peak and the dispersion at the zero probe detuning changes from positive to negative. Large population fluctuation and non-fluctuation observed in different systems are attributed to the different relaxation rates.

Fermi level pinning at the interface between high-κ gate dielectric and GaAs induced by unstable native oxides is a major obstacle for high performance GaAs-based metal-oxide-semiconductor (MOS) devices. We demonstrate the improved Al2O3/GaAs interfacial characteristics by (NH4)2S immersion and NH3 thermal pretreatment prior to Al2 O3 deposition. X-ray photoelectron spectroscopy (XPS) analysis confirms that sulfuration of GaAs surface by (NH4)2S solution can effectively reduce As-O bonds while Ga-O bonds and elemental As still exist at Al2 O3/GaAs interface. However, it is found that N incorporation during the further thermal nitridation on sulfurated GaAs can effectively suppress the native oxides and elemental As in the sequent deposition of Al2O3. Atomic force microscopy (AFM) shows that the further thermal nitridation on sulfurated GaAs surface can also improve the surface roughness.

HfO2 films were deposited by atomic layer deposition through alternating pulsing of Hf[N(C2H5)(CH3)]4 and H2O2. A trace amount of nitrogen was incorporated into the HfO2 through ammonia annealing. The composition, the interface stability of the HfO2/Si stack and the optical properties of the annealed films were analyzed to investigate the property evolution of HfO2 during thermal treatment. With a nitrogen concentration increase from 1.41 to 7.45%, the bandgap of the films decreased from 5.82 to 4.94 eV.

We perform a first-principles calculation based on density functional theory to investigate the interface between single layer graphene and metal oxides. Our study reveals that the monolayer graphene becomes semiconducting by single crystal SiO2 and Al2O3 contact, with energy gaps to ~ 0.9 and ~ 1.8eV, respectively. We find the gap originates from the breakage of π bond integrity, whose extent is related to the interface atom configuration. We believe that our results highlight a promising direction for the feasibility to apply large scale graphene layers as building blocks in future electronics devices.

An ultra-low-dielectric-constant (ultra low-k, or ULK) porous SiOCH film is prepared using a single ring-type siloxane precursor of the 2,4,6,8-tetravinyl-2,4,6,8-tetramethylcyclotetrasiloxane by means of spin-on deposition, followed by crosslinking reactions between the precursor monomers under UV irradiation. The as-prepared film has an ultra low k of 2.41 at 1 MHz due to incorporation of pores and hydrocarbon crosslinkages, a leakage current density of 9.86 × 10−7 A/cm2 at 1 MV/cm, as well as a breakdown field strength of ~1.5 MV/cm. Further, annealing at 300°C results in lower k (i.e., 1.94 at 1 MHz), smaller leakage current density (2.96 × 10−7 A/cm2 at 1 MV/cm) and higher breakdown field strength (about 3.5 MV/cm), which are likely caused by the short-ranged structural rearrangement and reduction of defects in the film. Finally, the mechanical properties and surface morphology of films are also evaluated after different temperature annealing.

Growth of Pt nanocrystals has been investigated by means of electron beam evaporation of Pt layer and post rapid thermal annealing. The results indicate that the density of nanocrystals increases first with the annealing temperature and the annealing time，followed by a slight decrease. Uniformly distributed nanocystals with a density of 30×1011 cm-2 can be obtained in the case of the annealing at 800℃ for 20 s. Further，memory effect of Al2O3/Pt nanocrystals/HfO2-based MOS capacitors has been characterized，indicating a capacitance-voltage （C-V） hysteresis window as large as 201 V in the sweep voltage range of -3—+8 V. In terms of the same programming time，the flat band voltage shift of the memory capacitor starts to increase remarkably when the programming voltage is increased to 9 V. This is related to a decrease in the energy barrier across the tunneling layer for electrons，i.e.，the tunnel mechanism of electrons is changed from direct tunneling to Fowler-Nordheim tunneling. Moreover，the memory capacitor also exhibits a capability of continuous electron trapping with prolonging of the programming duration.

We report the chemical self-assembly growth of Au nanocrystals on atomic-layer-deposited HfO2 films aminosilanized by (3-Aminopropyl)-trimethoxysilane aforehand for memory applications. The resulting Au nanocrystals show a density of about 4 × 1011 cm−2 and a diameter range of 5–8nm. The metal-oxide-silicon capacitor with double-layer Au nanocrystals embedded in HfO2 dielectric exhibits a large C – V hysteresis window of 11.9V for ±11 V gate voltage sweeps at 1 MHz, a flat-band voltage shift of 1.5 V after the electrical stress under 7 V for 1 ms, a leakage current density of 2.9 × 10−8 A/cm−2 at 9 V and room temperature. Compared to single-layer Au nanocrystals, the double-layer Au nanocrystals increase the hysteresis window significantly, and the underlying mechanism is thus discussed.

An atomic-layer-deposited Al2O3/HfO2/Al2O3 (A/H/A) tunnel barrier is investigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantl ...

The reaction mechanisms of Al(CH3)3 (TMA) adsorption on H-passivated GeSi(100)-2 ? 1 surface are investigated with density functional theory. The Si?Ge and Ge?Ge one-dimer cluster models are employed to represent the GeSi(100)-2 ? 1 surface with different Ge compositions. For a Si-Ge dimer of a H-passivated SiGe surface, TMA adsorption on both Si?H* and Ge?H* sites is considered. The activation barrier of TMA with the Si?H* site (1.2eV) is higher than that of TMA with the Ge-H* site (0.91 eV), which indicates that the reaction proceeds more slowly on the Si-H* site than on the Ge-H* site. In addition, adsorption of TMA is more energetically favorable on the Ge?Ge dimer than on the Si?Ge dimer of H-passivated SiGe.