1. A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm
- Author
-
Feng Wei Kuo, Chewn-Pu Jou, Lan-Chou Cho, Fu-Lung Hsueh, Mina Shahmohammadi, Masoud Babaie, Robert Bogdan Staszewski, and Huan-Neng Ron Chen
- Subjects
Engineering ,oscillators ,supply voltage reduction ,Internet of Things ,1/f noise reduction ,low-voltage oscillator ,02 engineering and technology ,Hardware_PERFORMANCEANDRELIABILITY ,7. Clean energy ,Radio transmitters ,law.invention ,Bluetooth ,class-E/F 2 power amplifier ,MOSFET circuits ,law ,Radio frequency ,0202 electrical engineering, electronic engineering, information engineering ,Inductors ,sampling rate reduction ,direct DCO data modulation ,class-E-F2 switching power amplifier ,RF power amplifier ,Transmitter ,Electrical engineering ,Q-factor ,CMOS digital integrated circuits ,all-digital PLL ,Switching current-source oscillator ,digital phase locked loops ,Low-voltage oscillator ,CMOS ,constant current sources ,ultra-low power radios ,switching current sources ,All-digital PLL ,efficiency 36 percent ,fully integrated Bluetooth low-energy transmitter architecture ,metal density ,power 5.5 mW ,CMOS transistors ,low-power transmitter ,Low-power transmitter ,energy-hungry RF circuits ,Hardware_GENERAL ,Electronic engineering ,Hardware_INTEGRATEDCIRCUITS ,Digitally controlled oscillator ,Electrical and Electronic Engineering ,power 3.6 mW ,threshold voltage ,switching current-source oscillator ,business.industry ,Amplifier ,radiofrequency power amplifiers ,020208 electrical & electronic engineering ,size 28 nm ,020206 networking & telecommunications ,CMOS integrated circuits ,radiofrequency integrated circuits ,Internet of Things (IoT) ,Phase-locked loop ,Bluetooth Low-Energy ,low-power electronics ,Bluetooth low-energy mode ,business ,digitally controlled oscillator ,Low voltage ,Switches - Abstract
We propose a new transmitter architecture for ultra-low power radios in which the most energy-hungry RF circuits operate at a supply just above a threshold voltage of CMOS transistors. An all-digital PLL employs a digitally controlled oscillator with switching current sources to reduce supply voltage and power without sacrificing its startup margin. It also reduces 1/f noise and supply pushing, thus allowing the ADPLL, after settling, to reduce its sampling rate or shut it off entirely during a direct DCO data modulation. The switching power amplifier integrates its matching network while operating in class-E/F2 to maximally enhance its efficiency at low voltage. The transmitter is realized in 28 nm digital CMOS and satisfies all metal density and other manufacturing rules. It consumes 3.6 mW/5.5 mW while delivering 0 dBm/3 dBm RF power in Bluetooth Low-Energy mode. European Research Council
- Published
- 2016