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A new design of 1-to-2 line all-optical logic decoder has been proposed based on a two-dimensional photonic crystal (PhC) structure. The decoder operates based on the principle of optical interference within the PhC waveguides. An optical bias has been used to generate high-logic states at zero input conditions. Simulations explore a high contrast ratio, in the order of 11.3 dB, for both the output ports of the device. Response times have been calculated from the transient responses of the output ports, and are found as 0.65 and 0.77 ps for the ports 1 and 2, respectively. These results in a bit rate of ≃625 Gbps, considering the worst-case scenario. Phase sensitivity analysis has also been performed which shows that the device output is quite sensitive to the differences in phases of the bias and signals. However, a strategy has been proposed to make the same insensitive to the phase changes. Finally, the small footprint (in the order of 234 μm 2 ); standard operating wavelength; and silicon-based design of the decoder, along with its said merits, make the device highly potential for on-chip photonic-integrated-circuit applications.

In this article, we have proposed a design of all-optical logic AND gate in the two-dimensional photonic crystal of triangular lattice structure with silicon rods in air background medium. Introducing line defect in the crystal, a Y-shaped waveguide is created and no nonlinear material is used to construct the device. The radiuses of few rods at the junction area are optimized to realize the operation of logic AND gate. The size of the proposed device is very small with a dimension of 77 μm2 and it provides a contrast ratio of 6.9 dB. It offers a response time of 0.193 picoseconds and a data rate of 2.8 Tbit/second. Plane wave expansion method and finite difference time domain method have been applied to calculate the band structure and to analyze the performance of the simulation, respectively.

An impedance matching theory-based methodology is presented in this study for designing/optimising photonic crystal-based all-optical AND gate. A basic architecture for the AND gate is projected first, and thereafter the same is optimised utilising the proposed methodology. Performance of the AND gate is evaluated based on several metrics that are calculated using a finite-difference-time-domain simulation. The optimised AND gate has exhibited a high extinction ratio in the order of 6.9 dB, within a very small footprint of ≈ 110 μ m 2 . It also supports propagation of a high bit rate (≈1 Tb/S) and has a wide operational bandwidth (≈4 THz), which make the device suitable for different photonic integrated circuit applications.

Optimized design of 60° bend optical waveguide has been proposed in this work. Two-dimensional (2D) triangular lattice Photonic Crystal (PhC) with holes in slab structure is used to design the waveguide having two 60° bends. A single hole in each of these bending regions is optimized to make the proposed design simple and easily fabricable. Plane Wave Expansion (PWE) algorithm has been used for evaluating the band diagram of the PhC. Finite Difference Time Domain (FDTD) method has been used to measure and analyze the wave propagation profile of the waveguide. Optical power transfer efficiency of the waveguide has been found as approximately 98% for two standard optical operating wavelengths.

In this paper few literatures on all-optical adders, reported approximately in last fifteen years, have been reviewed. Being the key element of arithmetic and logic unit (ALU), adder has attracted stirring attention of the researchers. The reviewed articles are primarily categorized into three broad sections based on the platforms utilized in designing all-optical adder namely semiconductor optical amplifier (SOA), plasmonics and photonic crystal (PhC). SOA based designs offer high contrast ratio between the output logic levels, however; at the cost of high response time and operating power. Plasmonic based designs provide miniaturized physical footprint of the devices owing to the tight optical confinement. Nevertheless, the process of fabrication involved with the plasmonic based designs along with the loss incurred at the metal are among the limiting features. In contrast, PhC based designs are much more advantageous owing to the notable characteristics of light propagation. The operating power and bandwidth of operation are also higher as compared to the other designs. Photonic crystal-based designs are further categorized into linear and nonlinear domains based on their operating principle. The design structures and performances have been summarized and a comparison is made. Some insights have been discussed leading to design of more efficient PhC based all-optical adders for next generation ultra-first optical processors.

This article investigates the suitable interface to attain the highest transmittance for a butt coupling of a strip and slotted photonic crystal waveguide. Different interfaces have been studied and it has been found that an interface position has a significant role in the coupling. Width of the strip waveguide has been varied to observe its effect in the transmittance. The result shows that a particular interface, denoted here as CC' found to be offering the best butt coupling for these waveguides, irrespective of the width of strip.

Design of an ultra-compact all optical 4 channel de-multiplexer is proposed in this work based on a two dimensional photonic crystal (PhC) structure. The PhC is formed using some silicon rods suspended in the air medium, which are arranged in a square lattice in a footprint of 75.24 μm2. The proposed component is designed to de-multiplex the wavelengths 1.31 μm, 1.43 μm, 1.55 μm and 1.7 μm. Simulations are performed using the Plane Wave Expansion (PWE) and the Finite Difference Time Domain (FDTD) methods which exhibit that the device offers a high contrast ratio ∼ 49 dB and a high data rate ∼ 3.8 Tbit/s.

A six-channel wavelength-division multiplexing filter is proposed in this paper, based on a two-dimensional rods-in-air square-lattice photonic crystal (PhC) slab structure. The plane wave expansion method is applied to compute the band structure of the PhC. Three-dimensional finite-difference time-domain simulation methodology is used to measure and analyze the performance of the filter. Performances for both the 2D and 3D designs of the structure are analyzed. The analyses show that the device is capable of filtering six different wavelengths, i.e., 1310 nm, 1415 nm, 1455 nm, 1550 nm, 1725 nm, and 1770 nm. Owing to its linear optical operation, the device is able to operate at low power and also offers a high data rate in the range of $ \approx 0.9\,\,{\rm Tb/s} $≈0.9Tb/s to $ \approx 4\,\,{\rm Tb/s} $≈4Tb/s. Moreover, the footprint area of the proposed device is on the order of $ {165}\,\,{{\unicode{x00B5}{\rm m}}^2} $165µm2, which is suitable for high-density integration of photonic circuits.

A transverse-electric (TE)-pass polarization filter based on a slotted photonic crystal waveguide structure is proposed for application in photonic integrated circuits. The silicon-slab-based structure is fabrication-compatible with the standard silicon-on-insulator process technologies. Different structural parameters, such as the r/a ratio of the photonic crystal sections, slab height, slot width, and slot length, are optimized for improved performance. Moreover, the conversion efficiency of a mode of a W1 waveguide to that of a slot waveguide is analyzed for different starting positions of the slot in order to achieve a high extinction ratio of the TE wave over the transverse-magnetic wave. A 3D finite difference time domain simulation methodology, which has been verified against an earlier experimental study made by researchers on another structure, is adopted to evaluate the transmittance of the structure. It shows that the polarization filter, with a footprint of merely 6.28 μm×4.35 μm, offers an extinction ratio in the order of 22 dB; this corresponds to an effective extinction ratio of 3.5 dB μm−1 considering the total length (or 6.5 dB μm−1 considering only the slot length). TE transmittance of the device is calculated as ≈−3 dB at a wavelength of 1550 nm.