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With an increasing number of multinational enterprises (MNEs) participating in public-private partnership (PPP) projects worldwide, the liability of foreignness in project construction and management become a manifested research topic in both academia and practice. This study aims to explore the impact of MNE participation on the survival of PPP projects. A unified theoretical framework with internal governance and external institutional environment is elaborated, and a dataset of 4,336 projects in 121 developing countries is derived from the World Bank database to empirically verify our hypotheses. The findings suggest that MNE participation has a detrimental impact on PPP project survival. Additionally, such detrimental impact is mitigated by the two dimensions (regulatory quality, and rule of law) and intensified by two other dimensions (political stability and absence of violence, and control of corruption) of the institutional conditions in the host country. This study contributes to the body of knowledge in two ways: (1) it is one of the pioneer studies that shed light on the liability of foreignness in the context of PPP projects and enhances our understanding of the MNEs' impacts on infrastructure projects; and (2) it enriches the stream of research on project success/failure by linking MNE participation to project survival and revealing the contingencies of host country's institutional conditions in the complex global market.

This work presents the growth of high-quality Ge epilayers on Si (001) substrates using a reduced pressure chemical vapor deposition (RPCVD) chamber. Based on the initial nucleation, a low temperature high temperature (LT-HT) two-step approach, we systematically investigate the nucleation time and surface topography, influence of a LT-Ge buffer layer thickness, a HT-Ge growth temperature, layer thickness, and high temperature thermal treatment on the morphological and crystalline quality of the Ge epilayers. It is also a unique study in the initial growth of Ge epitaxy; the start point of the experiments includes Stranski–Krastanov mode in which the Ge wet layer is initially formed and later the growth is developed to form nuclides. Afterwards, a two-dimensional Ge layer is formed from the coalescing of the nuclides. The evolution of the strain from the beginning stage of the growth up to the full Ge layer has been investigated. Material characterization results show that Ge epilayer with 400 nm LT-Ge buffer layer features at least the root mean square (RMS) value and it’s threading dislocation density (TDD) decreases by a factor of 2. In view of the 400 nm LT-Ge buffer layer, the 1000 nm Ge epilayer with HT-Ge growth temperature of 650◦C showed the best material quality, which is conducive to the merging of the crystals into a connected structure eventually forming a continuous and two-dimensional film. After increasing the thickness of Ge layer from 900 nm to 2000 nm, Ge surface roughness decreased first and then increased slowly (the RMS value for 1400 nm Ge layer was 0.81 nm). Finally, a high-temperature annealing process was carried out and high-quality Ge layer was obtained (TDD=2.78 × 107 cm−2 ). In addition, room temperature strong photoluminescence (PL) peak intensity and narrow full width at half maximum (11 meV) spectra further confirm the high crystalline quality of the Ge layer manufactured by this optimized process. This work highlights the inducing, i

This work presents the growth of high-quality Ge epilayers on Si (001) substrates using a reduced pressure chemical vapor deposition (RPCVD) chamber. Based on the initial nucleation, a low temperature high temperature (LT-HT) two-step approach, we systematically investigate the nucleation time and surface topography, influence of a LT-Ge buffer layer thickness, a HT-Ge growth temperature, layer thickness, and high temperature thermal treatment on the morphological and crystalline quality of the Ge epilayers. It is also a unique study in the initial growth of Ge epitaxy; the start point of the experiments includes Stranski–Krastanov mode in which the Ge wet layer is initially formed and later the growth is developed to form nuclides. Afterwards, a two-dimensional Ge layer is formed from the coalescing of the nuclides. The evolution of the strain from the beginning stage of the growth up to the full Ge layer has been investigated. Material characterization results show that Ge epilayer with 400 nm LT-Ge buffer layer features at least the root mean square (RMS) value and it’s threading dislocation density (TDD) decreases by a factor of 2. In view of the 400 nm LT-Ge buffer layer, the 1000 nm Ge epilayer with HT-Ge growth temperature of 650◦C showed the best material quality, which is conducive to the merging of the crystals into a connected structure eventually forming a continuous and two-dimensional film. After increasing the thickness of Ge layer from 900 nm to 2000 nm, Ge surface roughness decreased first and then increased slowly (the RMS value for 1400 nm Ge layer was 0.81 nm). Finally, a high-temperature annealing process was carried out and high-quality Ge layer was obtained (TDD=2.78 × 107 cm−2 ). In addition, room temperature strong photoluminescence (PL) peak intensity and narrow full width at half maximum (11 meV) spectra further confirm the high crystalline quality of the Ge layer manufactured by this optimized process. This work highlights the inducing, i

Timed Failure Propagation Graphs (TFPGs) have been widely used for the failure modeling and diagnosis of safety-critical systems. Currently most TFPGs are manually constructed by system experts, a process that can be time-consuming, error-prone, and even impossible for systems with highly nonlinear and machine-learning-based components. This letter proposes a new type of TFPGs, called Real-Valued Timed Failure Propagation Graphs (rTFPGs), designed for continuous-state systems. More importantly, it presents a systematic way of constructing rTFPGs by combining the powers of human experts and data-driven methods: first, an expert constructs a partial rTFPG based on his/her expertise; then a data-driven algorithm refines the rTFPG by adding nodes and edges based on a given set of labeled signals. The proposed approach has been successfully implemented and evaluated on three case studies.

This work presents the growth of high-quality Ge epilayers on Si (001) substrates using a reduced pressure chemical vapor deposition (RPCVD) chamber. Based on the initial nucleation, a low temperature high temperature (LT-HT) two-step approach, we systematically investigate the nucleation time and surface topography, influence of a LT-Ge buffer layer thickness, a HT-Ge growth temperature, layer thickness, and high temperature thermal treatment on the morphological and crystalline quality of the Ge epilayers. It is also a unique study in the initial growth of Ge epitaxy; the start point of the experiments includes Stranski–Krastanov mode in which the Ge wet layer is initially formed and later the growth is developed to form nuclides. Afterwards, a two-dimensional Ge layer is formed from the coalescing of the nuclides. The evolution of the strain from the beginning stage of the growth up to the full Ge layer has been investigated. Material characterization results show that Ge epilayer with 400 nm LT-Ge buffer layer features at least the root mean square (RMS) value and it’s threading dislocation density (TDD) decreases by a factor of 2. In view of the 400 nm LT-Ge buffer layer, the 1000 nm Ge epilayer with HT-Ge growth temperature of 650◦C showed the best material quality, which is conducive to the merging of the crystals into a connected structure eventually forming a continuous and two-dimensional film. After increasing the thickness of Ge layer from 900 nm to 2000 nm, Ge surface roughness decreased first and then increased slowly (the RMS value for 1400 nm Ge layer was 0.81 nm). Finally, a high-temperature annealing process was carried out and high-quality Ge layer was obtained (TDD=2.78 × 107 cm−2 ). In addition, room temperature strong photoluminescence (PL) peak intensity and narrow full width at half maximum (11 meV) spectra further confirm the high crystalline quality of the Ge layer manufactured by this optimized process. This work highlights the inducing, i

This work presents the growth of high-quality Ge epilayers on Si (001) substrates using a reduced pressure chemical vapor deposition (RPCVD) chamber. Based on the initial nucleation, a low temperature high temperature (LT-HT) two-step approach, we systematically investigate the nucleation time and surface topography, influence of a LT-Ge buffer layer thickness, a HT-Ge growth temperature, layer thickness, and high temperature thermal treatment on the morphological and crystalline quality of the Ge epilayers. It is also a unique study in the initial growth of Ge epitaxy; the start point of the experiments includes Stranski–Krastanov mode in which the Ge wet layer is initially formed and later the growth is developed to form nuclides. Afterwards, a two-dimensional Ge layer is formed from the coalescing of the nuclides. The evolution of the strain from the beginning stage of the growth up to the full Ge layer has been investigated. Material characterization results show that Ge epilayer with 400 nm LT-Ge buffer layer features at least the root mean square (RMS) value and it’s threading dislocation density (TDD) decreases by a factor of 2. In view of the 400 nm LT-Ge buffer layer, the 1000 nm Ge epilayer with HT-Ge growth temperature of 650◦C showed the best material quality, which is conducive to the merging of the crystals into a connected structure eventually forming a continuous and two-dimensional film. After increasing the thickness of Ge layer from 900 nm to 2000 nm, Ge surface roughness decreased first and then increased slowly (the RMS value for 1400 nm Ge layer was 0.81 nm). Finally, a high-temperature annealing process was carried out and high-quality Ge layer was obtained (TDD=2.78 × 107 cm−2 ). In addition, room temperature strong photoluminescence (PL) peak intensity and narrow full width at half maximum (11 meV) spectra further confirm the high crystalline quality of the Ge layer manufactured by this optimized process. This work highlights the inducing, i

Timed Failure Propagation Graphs (TFPGs) have been widely used for the failure modeling and diagnosis of safety-critical systems. Currently most TFPGs are manually constructed by system experts, a process that can be time-consuming, error-prone, and even impossible for systems with highly nonlinear and machine-learning-based components. This letter proposes a new type of TFPGs, called Real-Valued Timed Failure Propagation Graphs (rTFPGs), designed for continuous-state systems. More importantly, it presents a systematic way of constructing rTFPGs by combining the powers of human experts and data-driven methods: first, an expert constructs a partial rTFPG based on his/her expertise; then a data-driven algorithm refines the rTFPG by adding nodes and edges based on a given set of labeled signals. The proposed approach has been successfully implemented and evaluated on three case studies.

This article presents a novel method to grow a high-quality compressive-strain Ge epilayer on Si using the selective epitaxial growth (SEG) applying the RPCVD technique. The procedures are composed of a global growth of Ge layer on Si followed by a planarization using CMP as initial process steps. The growth parameters of the Ge layer were carefully optimized and after cycle-annealing treatments, the threading dislocation density (TDD) was reduced to 3 × 107 cm−2 . As a result of this process, a tensile strain of 0.25% was induced, whereas the RMS value was as low as 0.81 nm. Later, these substrates were covered by an oxide layer and patterned to create trenches for selective epitaxy growth (SEG) of the Ge layer. In these structures, a type of compressive strain was formed in the SEG Ge top layer. The strain amount was −0.34%; meanwhile, the TDD and RMS surface roughness were 2 × 106 cm−2 and 0.68 nm, respectively. HRXRD and TEM results also verified the existence of compressive strain in selectively grown Ge layer. In contrast to the tensile strained Ge layer (globally grown), enhanced PL intensity by a factor of more than 2 is partially due to the improved material quality. The significantly high PL intensity is attributed to the improved crystalline quality of the selectively grown Ge layer. The change in direct bandgap energy of PL was observed, owing to the compressive strain introduced. Hall measurement shows that a selectively grown Ge layer possesses room temperature hole mobility up to 375 cm2/Vs, which is approximately 3 times larger than that of the Ge (132 cm2/Vs). Our work offers fundamental guidance for the growth of high-quality and compressive strain Ge epilayer on Si for future Ge-based optoelectronics integration applications.

In this article, we demonstrated novel methods to improve the performance of p-i-n photodetectors (PDs) on a germanium-on-insulator (GOI). For GOI photodetectors with a mesa diameter of 10 µm, the dark current at −1 V is 2.5 nA, which is 2.6-fold lower than that of the Ge PD processed on Si substrates. This improvement in dark current is due to the careful removal of the defected Ge layer, which is formed with the initial growth of Ge on Si. The bulk leakage current density and surface leakage density of the GOI detector at −1 V are as low as 1.79 mA/cm2 and 0.34 µA/cm, respectively. GOI photodetectors with responsivity of 0.5 and 0.9 A/W at 1550 and 1310 nm wavelength are demonstrated. The optical performance of the GOI photodetector could be remarkably improved by integrating a tetraethylorthosilicate (TEOS) layer on the oxide side due to the better optical confinement and resonant cavity effect. These PDs with high performances and full compatibility with Si CMOS processes are attractive for applications in both telecommunications and monolithic optoelectronics integration on the same chip.

This article presents a novel method to grow a high-quality compressive-strain Ge epilayer on Si using the selective epitaxial growth (SEG) applying the RPCVD technique. The procedures are composed of a global growth of Ge layer on Si followed by a planarization using CMP as initial process steps. The growth parameters of the Ge layer were carefully optimized and after cycle-annealing treatments, the threading dislocation density (TDD) was reduced to 3 × 107 cm−2 . As a result of this process, a tensile strain of 0.25% was induced, whereas the RMS value was as low as 0.81 nm. Later, these substrates were covered by an oxide layer and patterned to create trenches for selective epitaxy growth (SEG) of the Ge layer. In these structures, a type of compressive strain was formed in the SEG Ge top layer. The strain amount was −0.34%; meanwhile, the TDD and RMS surface roughness were 2 × 106 cm−2 and 0.68 nm, respectively. HRXRD and TEM results also verified the existence of compressive strain in selectively grown Ge layer. In contrast to the tensile strained Ge layer (globally grown), enhanced PL intensity by a factor of more than 2 is partially due to the improved material quality. The significantly high PL intensity is attributed to the improved crystalline quality of the selectively grown Ge layer. The change in direct bandgap energy of PL was observed, owing to the compressive strain introduced. Hall measurement shows that a selectively grown Ge layer possesses room temperature hole mobility up to 375 cm2/Vs, which is approximately 3 times larger than that of the Ge (132 cm2/Vs). Our work offers fundamental guidance for the growth of high-quality and compressive strain Ge epilayer on Si for future Ge-based optoelectronics integration applications.

In this article, we demonstrated novel methods to improve the performance of p-i-n photodetectors (PDs) on a germanium-on-insulator (GOI). For GOI photodetectors with a mesa diameter of 10 µm, the dark current at −1 V is 2.5 nA, which is 2.6-fold lower than that of the Ge PD processed on Si substrates. This improvement in dark current is due to the careful removal of the defected Ge layer, which is formed with the initial growth of Ge on Si. The bulk leakage current density and surface leakage density of the GOI detector at −1 V are as low as 1.79 mA/cm2 and 0.34 µA/cm, respectively. GOI photodetectors with responsivity of 0.5 and 0.9 A/W at 1550 and 1310 nm wavelength are demonstrated. The optical performance of the GOI photodetector could be remarkably improved by integrating a tetraethylorthosilicate (TEOS) layer on the oxide side due to the better optical confinement and resonant cavity effect. These PDs with high performances and full compatibility with Si CMOS processes are attractive for applications in both telecommunications and monolithic optoelectronics integration on the same chip.

The threat of 3D masks to face recognition systems is increasingly serious and has been widely concerned by researchers. To facilitate the study of the algorithms, a largescale High-Fidelity Mask dataset, namely CASIA-SURF HiFiMask (briefly HiFiMask) has been collected. Specifically, it consists of a total amount of 54,600 videos which are recorded from 75 subjects with 225 realistic masks under 7 new kinds of sensors [21]. Based on this dataset and Protocol 3 which evaluates both the discrimination and generalization ability of the algorithm under the open set scenarios, we organized a 3D High-Fidelity Mask Face Presentation Attack Detection Challenge to boost the research of 3D mask-based attack detection. It attracted 195 teams for the development phase with a total of 18 teams qualifying for the final round. All the results were verified and re-run by the organizing team, and the results were used for the final ranking. This paper presents an overview of the challenge, including the introduction of the dataset used, the definition of the protocol, the calculation of the evaluation criteria, and the summary and publication of the competition results. Finally, we focus on introducing and analyzing the top ranking algorithms, the conclusion summary, and the research ideas for mask attack detection provided by this competition.

GeSn alloys have already attracted extensive attention due to their excellent properties and wide-ranging electronic and optoelectronic applications. Both theoretical and experimental results have shown that direct bandgap GeSn alloys are preferable for Si-based, high-efficiency light source applications. For the abovementioned purposes, molecular beam epitaxy (MBE), physical vapour deposition (PVD), and chemical vapor deposition (CVD) technologies have been extensively explored to grow high-quality GeSn alloys. However, CVD is the dominant growth method in the industry, and it is therefore more easily transferred. This review is focused on the recent progress in GeSn CVD growth (including ion implantation, in situ doping technology, and ohmic contacts), GeSn detectors, GeSn lasers, and GeSn transistors. These review results will provide huge advancements for the research and development of high-performance electronic and optoelectronic devices. © 2021 by the authors. Licensee MDPI, Basel, Switzerland.

This article presents a novel method to grow a high-quality compressive-strain Ge epilayer on Si using the selective epitaxial growth (SEG) applying the RPCVD technique. The procedures are composed of a global growth of Ge layer on Si followed by a planarization using CMP as initial process steps. The growth parameters of the Ge layer were carefully optimized and after cycle-annealing treatments, the threading dislocation density (TDD) was reduced to 3 × 107 cm−2 . As a result of this process, a tensile strain of 0.25% was induced, whereas the RMS value was as low as 0.81 nm. Later, these substrates were covered by an oxide layer and patterned to create trenches for selective epitaxy growth (SEG) of the Ge layer. In these structures, a type of compressive strain was formed in the SEG Ge top layer. The strain amount was −0.34%; meanwhile, the TDD and RMS surface roughness were 2 × 106 cm−2 and 0.68 nm, respectively. HRXRD and TEM results also verified the existence of compressive strain in selectively grown Ge layer. In contrast to the tensile strained Ge layer (globally grown), enhanced PL intensity by a factor of more than 2 is partially due to the improved material quality. The significantly high PL intensity is attributed to the improved crystalline quality of the selectively grown Ge layer. The change in direct bandgap energy of PL was observed, owing to the compressive strain introduced. Hall measurement shows that a selectively grown Ge layer possesses room temperature hole mobility up to 375 cm2/Vs, which is approximately 3 times larger than that of the Ge (132 cm2/Vs). Our work offers fundamental guidance for the growth of high-quality and compressive strain Ge epilayer on Si for future Ge-based optoelectronics integration applications.

In this article, we demonstrated novel methods to improve the performance of p-i-n photodetectors (PDs) on a germanium-on-insulator (GOI). For GOI photodetectors with a mesa diameter of 10 µm, the dark current at −1 V is 2.5 nA, which is 2.6-fold lower than that of the Ge PD processed on Si substrates. This improvement in dark current is due to the careful removal of the defected Ge layer, which is formed with the initial growth of Ge on Si. The bulk leakage current density and surface leakage density of the GOI detector at −1 V are as low as 1.79 mA/cm2 and 0.34 µA/cm, respectively. GOI photodetectors with responsivity of 0.5 and 0.9 A/W at 1550 and 1310 nm wavelength are demonstrated. The optical performance of the GOI photodetector could be remarkably improved by integrating a tetraethylorthosilicate (TEOS) layer on the oxide side due to the better optical confinement and resonant cavity effect. These PDs with high performances and full compatibility with Si CMOS processes are attractive for applications in both telecommunications and monolithic optoelectronics integration on the same chip.

This article presents a novel method to grow a high-quality compressive-strain Ge epilayer on Si using the selective epitaxial growth (SEG) applying the RPCVD technique. The procedures are composed of a global growth of Ge layer on Si followed by a planarization using CMP as initial process steps. The growth parameters of the Ge layer were carefully optimized and after cycle-annealing treatments, the threading dislocation density (TDD) was reduced to 3 × 107 cm−2 . As a result of this process, a tensile strain of 0.25% was induced, whereas the RMS value was as low as 0.81 nm. Later, these substrates were covered by an oxide layer and patterned to create trenches for selective epitaxy growth (SEG) of the Ge layer. In these structures, a type of compressive strain was formed in the SEG Ge top layer. The strain amount was −0.34%; meanwhile, the TDD and RMS surface roughness were 2 × 106 cm−2 and 0.68 nm, respectively. HRXRD and TEM results also verified the existence of compressive strain in selectively grown Ge layer. In contrast to the tensile strained Ge layer (globally grown), enhanced PL intensity by a factor of more than 2 is partially due to the improved material quality. The significantly high PL intensity is attributed to the improved crystalline quality of the selectively grown Ge layer. The change in direct bandgap energy of PL was observed, owing to the compressive strain introduced. Hall measurement shows that a selectively grown Ge layer possesses room temperature hole mobility up to 375 cm2/Vs, which is approximately 3 times larger than that of the Ge (132 cm2/Vs). Our work offers fundamental guidance for the growth of high-quality and compressive strain Ge epilayer on Si for future Ge-based optoelectronics integration applications.

In this article, we demonstrated novel methods to improve the performance of p-i-n photodetectors (PDs) on a germanium-on-insulator (GOI). For GOI photodetectors with a mesa diameter of 10 µm, the dark current at −1 V is 2.5 nA, which is 2.6-fold lower than that of the Ge PD processed on Si substrates. This improvement in dark current is due to the careful removal of the defected Ge layer, which is formed with the initial growth of Ge on Si. The bulk leakage current density and surface leakage density of the GOI detector at −1 V are as low as 1.79 mA/cm2 and 0.34 µA/cm, respectively. GOI photodetectors with responsivity of 0.5 and 0.9 A/W at 1550 and 1310 nm wavelength are demonstrated. The optical performance of the GOI photodetector could be remarkably improved by integrating a tetraethylorthosilicate (TEOS) layer on the oxide side due to the better optical confinement and resonant cavity effect. These PDs with high performances and full compatibility with Si CMOS processes are attractive for applications in both telecommunications and monolithic optoelectronics integration on the same chip.

In this article, we demonstrated novel methods to improve the performance of p-i-n photodetectors (PDs) on a germanium-on-insulator (GOI). For GOI photodetectors with a mesa diameter of 10 µm, the dark current at −1 V is 2.5 nA, which is 2.6-fold lower than that of the Ge PD processed on Si substrates. This improvement in dark current is due to the careful removal of the defected Ge layer, which is formed with the initial growth of Ge on Si. The bulk leakage current density and surface leakage density of the GOI detector at −1 V are as low as 1.79 mA/cm2 and 0.34 µA/cm, respectively. GOI photodetectors with responsivity of 0.5 and 0.9 A/W at 1550 and 1310 nm wavelength are demonstrated. The optical performance of the GOI photodetector could be remarkably improved by integrating a tetraethylorthosilicate (TEOS) layer on the oxide side due to the better optical confinement and resonant cavity effect. These PDs with high performances and full compatibility with Si CMOS processes are attractive for applications in both telecommunications and monolithic optoelectronics integration on the same chip.

This article presents a novel method to grow a high-quality compressive-strain Ge epilayer on Si using the selective epitaxial growth (SEG) applying the RPCVD technique. The procedures are composed of a global growth of Ge layer on Si followed by a planarization using CMP as initial process steps. The growth parameters of the Ge layer were carefully optimized and after cycle-annealing treatments, the threading dislocation density (TDD) was reduced to 3 × 107 cm−2 . As a result of this process, a tensile strain of 0.25% was induced, whereas the RMS value was as low as 0.81 nm. Later, these substrates were covered by an oxide layer and patterned to create trenches for selective epitaxy growth (SEG) of the Ge layer. In these structures, a type of compressive strain was formed in the SEG Ge top layer. The strain amount was −0.34%; meanwhile, the TDD and RMS surface roughness were 2 × 106 cm−2 and 0.68 nm, respectively. HRXRD and TEM results also verified the existence of compressive strain in selectively grown Ge layer. In contrast to the tensile strained Ge layer (globally grown), enhanced PL intensity by a factor of more than 2 is partially due to the improved material quality. The significantly high PL intensity is attributed to the improved crystalline quality of the selectively grown Ge layer. The change in direct bandgap energy of PL was observed, owing to the compressive strain introduced. Hall measurement shows that a selectively grown Ge layer possesses room temperature hole mobility up to 375 cm2/Vs, which is approximately 3 times larger than that of the Ge (132 cm2/Vs). Our work offers fundamental guidance for the growth of high-quality and compressive strain Ge epilayer on Si for future Ge-based optoelectronics integration applications.

Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: Inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: Inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

Multiple-player games involving cooperative and adversarial agents are a type of problems of great practical significance. In this letter, we consider an attack-defense game with a single attacker and multiple defenders. The attacker attempts to enter a protected region, while the defenders attempt to defend the same region and capture the attacker outside the region. We propose a distributed pursuit-defense strategy for the defenders' cooperative defense against the attacker. Inside a bounded, convex, two-dimensional space, the defenders choose among an area-decreasing, a distance-decreasing, or a pursuing strategy. We prove that our strategy guarantees the attacker to be captured before entering the protected region in a finite time. We also demonstrate with simulations that a human-controlled attacker is unable to enter a protected region when multiple defenders are using our pursuit-defense strategy.

Multiple-player games involving cooperative and adversarial agents are a type of problems of great practical significance. In this letter, we consider an attack-defense game with a single attacker and multiple defenders. The attacker attempts to enter a protected region, while the defenders attempt to defend the same region and capture the attacker outside the region. We propose a distributed pursuit-defense strategy for the defenders' cooperative defense against the attacker. Inside a bounded, convex, two-dimensional space, the defenders choose among an area-decreasing, a distance-decreasing, or a pursuing strategy. We prove that our strategy guarantees the attacker to be captured before entering the protected region in a finite time. We also demonstrate with simulations that a human-controlled attacker is unable to enter a protected region when multiple defenders are using our pursuit-defense strategy.

Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: Inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

On approach towards the end of technology roadmap, a revolutionary approach towards the nanowire transistors is favorable due to the full control of carrier transport. The transistor design moves toward vertically or laterally stacked Gate-All-Around (GAA) where Si or SiGe can be used as channel material. This study presents a novel isotropic inductively coupled plasma (ICP) dry etching of Si1−xGex (0.10 ≤ x ≤ 0.28) in SiGe/Si multilayer structures (MLSs) with high selectivity to Si, SiO2, Si3N4 and SiON which can be applied in advanced 3D transistors and Micro-Electro-Mechanical System (MEMS) in future. The profile of SiGe etching for different thicknesses, compositions and locations in MLSs using dry or wet etch have been studied. A special care has been spent for layer quality of Si, strain relaxation of SiGe layers as well as residual contamination during the etching. In difference with dry etching methods (downstream remote plasma), the conventional ICP source in situ is used where CF4/O2/He gas mixture was used as the etching gas to obtain higher selectivity. Based on the reliability of ICP technique a range of etching rate 25–50 nm/min can be obtained for accurate isotropic etching of Si1−xGex, to form cavity in advanced 3D transistor processes in future.

Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: Inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

Stacked SiGe/Si structures are widely used as the units for gate-all-around nanowire transistors (GAA NWTs) which are a promising candidate beyond fin field effective transistors (FinFETs) technologies in near future. These structures deal with a several challenges brought by the shrinking of device dimensions. The preparation of inner spacers is one of the most critical processes for GAA nano-scale transistors. This study focuses on two key processes: Inner spacer film conformal deposition and accurate etching. The results show that low pressure chemical vapor deposition (LPCVD) silicon nitride has a good film filling effect; a precise and controllable silicon nitride inner spacer structure is prepared by using an inductively coupled plasma (ICP) tool and a new gas mixtures of CH2F2/CH4/O2/Ar. Silicon nitride inner spacer etch has a high etch selectivity ratio, exceeding 100:1 to Si and more than 30:1 to SiO2. High anisotropy with an excellent vertical/lateral etch ratio exceeding 80:1 is successfully demonstrated. It also provides a solution to the key process challenges of nano-transistors beyond 5 nm node. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

A new type of vertical nanowire (NW)/nanosheet (NS) field-effect transistors (FETs), termed vertical sandwich gate-all-around (GAA) FETs (VSAFETs), is presented in this work. Moreover, an integration flow that is compatible with processes used in the mainstream industry is proposed for the VSAFETs. Si/SiGe epitaxy, isotropic quasi-atomic-layer etching (qALE), and gate replacement were used to fabricate pVSAFETs for the first time. Vertical GAA FETs with self-aligned high-k metal gates and a small effective-gate-length variation were obtained. Isotropic qALE, including Si-selective etching of SiGe, was developed to control the diameter/thickness of the NW/NS channels. NWs with a diameter of 10 nm and NSs with a thickness of 20 nm were successfully fabricated, and good device characteristics were obtained. Finally, the device performance was investigated and is discussed in this work. © 2019 IEEE.

With the development of new designs and materials for nano-scale transistors, vertical Gate-All-Around Field Effect Transistors (vGAAFETs) with germanium as channel materials have emerged as excellent choices. The driving forces for this choice are the full control of the short channel effect and the high carrier mobility in the channel region. In this work, a novel process to form the structure for a VGAA transistor with a Ge channel is presented. The structure consists of multilayers of Si0.2Ge0.8/Ge grown on a Ge buffer layer grown by the reduced pressure chemical vapor deposition technique. The Ge buffer layer growth consists of low-temperature growth at 400 °C and high-temperature growth at 650 °C. The impact of the epitaxial quality of the Ge buffer on the defect density in the Si0.2Ge0.8/Ge stack has been studied. In this part, different thicknesses (0.6, 1.2 and 2.0 µm) of the Ge buffer on the quality of the Si0.2Ge0.8/Ge stack structure have been investigated. The thicker Ge buffer layer can improve surface roughness. A high-quality and atomically smooth surface with RMS 0.73 nm of the Si0.2Ge0.8/Ge stack structure can be successfully realized on the 1.2 µm Ge buffer layer. After the epitaxy step, the multilayer is vertically dry-etched to form a fin where the Ge channel is selectively released to SiGe by using wet-etching in HNO3 and H2O2 solution at room temperature. It has been found that the solution concentration has a great effect on the etch rate. The relative etching depth of Ge is linearly dependent on the etching time in H2O2 solution. The results of this study emphasize the selective etching of germanium and provide the experimental basis for the release of germanium channels in the future. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.

A digital etching method was proposed to achieve excellent control of etching depth. The digital etching characteristics of p+-Si and Si0.7Ge0.3 using a combination of HNO3 oxidation and buffered oxide etching oxide removal processes were investigated. Experimental results showed that oxidation saturates as time goes on because of low activation energy and its diffusion-limited characteristic. An oxidation model was developed to describe the wet oxidation process with nitric acid. The model was calibrated with experimental data, and the oxidation saturation time, final oxide thickness, and selectivity between Si0.7Ge0.3 and p+-Si were obtained. In Si0.7Ge0.3/p+-Si stacks, the saturated relative etched depth per cycle was 0.5 nm (four monolayers), and variation between experiments was about 4% after saturation. A corrected selectivity calculation formula was also proposed, and the calculated selectivity was 3.7-7.7 for different oxidation times, which was the same as the selectivity obtained from our oxidation model. The proposed model can be used to analyze process variations and repeatability, and it can provide credible guidance for the design of other wet digital etching experiments. © 2020 American Chemical Society.

Vertical gate-all-around field-effect transistors (vGAAFETs) are considered as the potential candidates to replace FinFETs for advanced integrated circuit manufacturing technology at/beyond 3-nm technology node. A multilayer (ML) of Si/SiGe/Si is commonly grown and processed to form vertical transistors. In this work, the P-incorporation in Si/SiGe/Si and vertical etching of these MLs followed by selective etching SiGe in lateral direction to form structures for vGAAFET have been studied. Several strategies were proposed for the epitaxy such as hydrogen purging to deplete the access of P atoms on Si surface, and/or inserting a Si or Si0.93Ge0.07 spacers on both sides of P-doped Si layers, and substituting SiH4 by SiH2Cl2 (DCS). Experimental results showed that the segregation and auto-doping could also be relieved by adding 7% Ge to P-doped Si. The structure had good lattice quality and almost had no strain relaxation. The selective etching between P-doped Si (or P-doped Si0.93Ge0.07) and SiGe was also discussed by using wet and dry etching. The performance and selectivity of different etching methods were also compared. This paper provides knowledge of how to deal with the challenges or difficulties of epitaxy and etching of n-type layers in vertical GAAFETs structure. © 2020, The Author(s).

The increased complexity of modern systems necessitates automated anomaly detection methods to detect possible anomalous behavior determined by malfunctions or external attacks. We present formal methods for inferring (via supervised learning) and detecting (via unsupervised learning) anomalous behavior. Our procedures use data to construct a signal temporal logic (STL) formula that describes normal system behavior. This logic can be used to formulate properties such as 'If the train brakes within 500 m of the platform at a speed of 50 km/hr, then it will stop in at least 30 s and at most 50 s.' Our procedure infers not only the physical parameters involved in the formula (e.g., 500 m in the example above) but also its logical structure. STL gives a more human-readable representation of behavior than classifiers represented as surfaces in high-dimensional feature spaces. The learned formula enables us to perform early detection by using monitoring techniques and anomaly mitigation by using formal synthesis techniques. We demonstrate the power of our methods with examples of naval surveillance and a train braking system.

The increased complexity of modern systems necessitates automated anomaly detection methods to detect possible anomalous behavior determined by malfunctions or external attacks. We present formal methods for inferring (via supervised learning) and detecting (via unsupervised learning) anomalous behavior. Our procedures use data to construct a signal temporal logic (STL) formula that describes normal system behavior. This logic can be used to formulate properties such as 'If the train brakes within 500 m of the platform at a speed of 50 km/hr, then it will stop in at least 30 s and at most 50 s.' Our procedure infers not only the physical parameters involved in the formula (e.g., 500 m in the example above) but also its logical structure. STL gives a more human-readable representation of behavior than classifiers represented as surfaces in high-dimensional feature spaces. The learned formula enables us to perform early detection by using monitoring techniques and anomaly mitigation by using formal synthesis techniques. We demonstrate the power of our methods with examples of naval surveillance and a train braking system.

Mitigating ground effect becomes a big challenge for autonomous aerial vehicles when they are flying in close proximity to the ground. This paper aims to develop a precise model of ground effect on mini quadcopters, provide an advanced control algorithm to counter the model uncertainty and, as a result, improves the command tracking performance when the vehicle is in the ground effect region. The mathematical model of ground effect has been established through a series of experiments and validated by a flight test. The experiments show that the total thrust generated by rotors increases linearly as the vehicle gets closer to the ground, which is different from the commonly-used ground effect model for a single rotor vehicle. In addition, the model switches from a piecewise linear to a quadratic function when the rotor to rotor distance is increased. A control architecture that utilizes the model reference adaptive controller (MRAC) has also been designed, where MRAC is added to the altitude loop. The performance of the proposed control algorithm has been evaluated through a set of flight tests on a mini quadcopter platform and compared with a traditional proportional–integral–derivative (PID) controller. The results demonstrate that MRAC dramatically improves the tracking performance of altitude command and can reduce the rise time by 80 % under the ground effect.

Mitigating ground effect becomes a big challenge for autonomous aerial vehicles when they are flying in close proximity to the ground. This paper aims to develop a precise model of ground effect on mini quadcopters, provide an advanced control algorithm to counter the model uncertainty and, as a result, improves the command tracking performance when the vehicle is in the ground effect region. The mathematical model of ground effect has been established through a series of experiments and validated by a flight test. The experiments show that the total thrust generated by rotors increases linearly as the vehicle gets closer to the ground, which is different from the commonly-used ground effect model for a single rotor vehicle. In addition, the model switches from a piecewise linear to a quadratic function when the rotor to rotor distance is increased. A control architecture that utilizes the model reference adaptive controller (MRAC) has also been designed, where MRAC is added to the altitude loop. The performance of the proposed control algorithm has been evaluated through a set of flight tests on a mini quadcopter platform and compared with a traditional proportional–integral–derivative (PID) controller. The results demonstrate that MRAC dramatically improves the tracking performance of altitude command and can reduce the rise time by 80 % under the ground effect.

© 1997-2012 IEEE. The analysis of gene expression data is useful for detecting the biological information of genes. Biclustering of microarray data has been proposed as a powerful computational tool to discover subsets of genes that exhibit consistent expression patterns along subsets of conditions. In this paper, we propose a novel biclustering algorithm called the bi-phase evolutionary biclustering algorithm. The first phase is for the evolution of rows and columns, and the other is for the evolution of biclusters. The interaction of the two phases ensures a reliable search direction and accelerates the convergence to good solutions. Furthermore, the population is initialized using a conventional hierarchical clustering strategy to discover bicluster seeds. We also developed a seed-based parallel implementation of evolutionary searching to search biclusters more comprehensively. The performance of the proposed algorithm is compared with several popular biclustering algorithms using synthetic datasets and real microarray datasets. The experimental results show that the algorithm demonstrates a significant improvement in discovering biclusters.

© 1997-2012 IEEE. The analysis of gene expression data is useful for detecting the biological information of genes. Biclustering of microarray data has been proposed as a powerful computational tool to discover subsets of genes that exhibit consistent expression patterns along subsets of conditions. In this paper, we propose a novel biclustering algorithm called the bi-phase evolutionary biclustering algorithm. The first phase is for the evolution of rows and columns, and the other is for the evolution of biclusters. The interaction of the two phases ensures a reliable search direction and accelerates the convergence to good solutions. Furthermore, the population is initialized using a conventional hierarchical clustering strategy to discover bicluster seeds. We also developed a seed-based parallel implementation of evolutionary searching to search biclusters more comprehensively. The performance of the proposed algorithm is compared with several popular biclustering algorithms using synthetic datasets and real microarray datasets. The experimental results show that the algorithm demonstrates a significant improvement in discovering biclusters.

The inherent and increasing complexity of many cyber-physical systems (CPSs) makes it challenging for human users or designers to comprehend and interpret their performance. This issue, without proper attention paid, may lead to unwanted and even catastrophic consequences, particularly with safety-critical CPSs. This paper presents a new methodology of enabling (i) a human to interrogate a CPS by inquiring with questions written in formal logic and (ii) the CPS to interpret its performance precisely in the context of the inquiry. This formal interpretation problem is first formulated as temporal logic inference problem, which, aided by the concept of robustness degree, can be converted into an optimisation problem with probably approximately correct solutions. A new Gaussian-process-based active learning algorithm is then proposed to address the potential computational budget issue arising from solving the optimisation problem. Both theoretical and empirical analyses are carried out to demonstrate the performance of the proposed algorithm. Finally, a detailed case study on automotive mechatronic design is provided to showcase the proposed formal interpretation methodology.

Due to its high versatility and scalability, manual grinding is an important and widely used technology in production for rework, repair, deburring, and finishing of large or unique parts. To make the process more interactive and reliable, manual grinding needs to incorporate "skill-based design," which models a person-based system and can go significantly beyond the considerations of traditional human factors and ergonomics to encompass both processing parameters (e.g., feed rate, tool path, applied forces, material removal rate (MRR)), and machined surface quality (e.g., surface roughness). This study quantitatively analyzes the characteristics of complex techniques involved in manual operations. A series of experiments have been conducted using subjects of different levels of skill, while analyzing their visual gaze, cutting force, tool path, and workpiece quality. Analysis of variance (ANOVA) and multivariate regression analysis were performed and showed that the unique behavior of the operator affects the process performance measures of specific energy consumption and MRR. In the future, these findings can be used to predict product quality and instruct new practitioners.

This paper studies artistic expression in human movement by exploring the performance art form salsa. The motions of a salsa performance are constructed as concatenations of motion primitives, each of which specifies the movement of the dance pair over the course of eight musical beats. To analyze the syntax of artistic expression, the choreography of dance performances is represented by a transition model that is based on humanoid robot representations of the dancers. In order to assess the quality of a performance, two distinct metrics are explored. By integrating the performance metrics into the proposed transition system, it is possible to create an algorithm that is capable of autonomously recognizing the dance moves and evaluating the quality of the performance with a score. To validate the model, a dance pair performed four distinct salsa dance sequences observed by an artificially intelligent (AI) judge. The video recordings of the performances are also shown to a dance audience for evaluation. By looking at the correlation between the dance audience and the AI judge's scores, we conclude that the proposed model performs well in evaluating the artistic merit of the dance.

This paper studies artistic expression in human movement by exploring the performance art form salsa. The motions of a salsa performance are constructed as concatenations of motion primitives, each of which specifies the movement of the dance pair over the course of eight musical beats. To analyze the syntax of artistic expression, the choreography of dance performances is represented by a transition model that is based on humanoid robot representations of the dancers. In order to assess the quality of a performance, two distinct metrics are explored. By integrating the performance metrics into the proposed transition system, it is possible to create an algorithm that is capable of autonomously recognizing the dance moves and evaluating the quality of the performance with a score. To validate the model, a dance pair performed four distinct salsa dance sequences observed by an artificially intelligent (AI) judge. The video recordings of the performances are also shown to a dance audience for evaluation. By looking at the correlation between the dance audience and the AI judge's scores, we conclude that the proposed model performs well in evaluating the artistic merit of the dance.

The inherent and increasing complexity of many cyber-physical systems (CPSs) makes it challenging for human users or designers to comprehend and interpret their performance. This issue, without proper attention paid, may lead to unwanted and even catastrophic consequences, particularly with safety-critical CPSs. This paper presents a new methodology of enabling (i) a human to interrogate a CPS by inquiring with questions written in formal logic and (ii) the CPS to interpret its performance precisely in the context of the inquiry. This formal interpretation problem is first formulated as temporal logic inference problem, which, aided by the concept of robustness degree, can be converted into an optimisation problem with probably approximately correct solutions. A new Gaussian-process-based active learning algorithm is then proposed to address the potential computational budget issue arising from solving the optimisation problem. Both theoretical and empirical analyses are carried out to demonstrate the performance of the proposed algorithm. Finally, a detailed case study on automotive mechatronic design is provided to showcase the proposed formal interpretation methodology.

Due to its high versatility and scalability, manual grinding is an important and widely used technology in production for rework, repair, deburring, and finishing of large or unique parts. To make the process more interactive and reliable, manual grinding needs to incorporate "skill-based design," which models a person-based system and can go significantly beyond the considerations of traditional human factors and ergonomics to encompass both processing parameters (e.g., feed rate, tool path, applied forces, material removal rate (MRR)), and machined surface quality (e.g., surface roughness). This study quantitatively analyzes the characteristics of complex techniques involved in manual operations. A series of experiments have been conducted using subjects of different levels of skill, while analyzing their visual gaze, cutting force, tool path, and workpiece quality. Analysis of variance (ANOVA) and multivariate regression analysis were performed and showed that the unique behavior of the operator affects the process performance measures of specific energy consumption and MRR. In the future, these findings can be used to predict product quality and instruct new practitioners.

BACKGROUND: To date, none of the existing techno-economic analyses on natural gas dehydration via absorption using triethylene glycol takes into consideration the profit assessment. This work addresses this shortcoming by developing a techno-economic framework that evaluates the economic feasibility of three different dehydration processes, i.e., conventional dehydration process, stripping gas dehydration process using sale gas, and stripping gas dehydration process using nitrogen, which can meet the maximum water dew point requirement set by local authorities (e.g., Malaysia) for pipeline-transported natural gas. RESULTS: Our techno-economic analyses reveal that the maximum water dew point specification of -25 °C can only be achieved by using a stripping gas dehydration process that consumes more than 260 Nm3 h-1 of sale gas or 435 Nm3 h-1 of nitrogen. In particular, the use of sale gas as stripping gas with an optimum flow rate of 260 Nm3 h-1 generates the highest annual net profit margin, of about $29 million. Such a profit margin is higher with respect to the use of nitrogen as stripping gas and the conventional dehydration process by about $1.6 million and $300 000, respectively. The minimum water dew point specification of 5 °C, on the other hand, can be achieved by all three analysed dehydration processes. CONCLUSION: The use of sale gas as stripping gas becomes more justifiable economically relative to the conventional dehydration process and the other alternative (the use of nitrogen as stripping gas) and when a low water dew point specification of -25 °C is required for natural gas. © 2018 Society of Chemical Industry.

© 2018 Elsevier B.V. The glycol purity limit in conventional absorption-based natural gas dehydration process has led to the significant water vapour presence in the supposedly dry product gas. Several alternative processes have been developed to overcome this limitation that includes stripping gas injection using nitrogen, a portion of dry product gas, or volatile hydrocarbon (DRIZO process), stripping gas modified with Stahl column, and Coldfinger technology. This review summarises these different processes and elaborates on their mechanisms, process flow diagram, advantages, drawbacks, and current statuses. Relevant works from 1991 to 2017 were compiled and the existing gaps were highlighted as recommendation for future work.

This paper presents new techniques to analyze and understand the sensorimotor characteristics of manual operations such as grinding, and links their influence on process performance. A grinding task, though simple, requires the practitioner to combine elements from the large repertoire of his or her skillset. Based on the joint gaze, force, and velocity data collected from a series of manual grinding experiments, we have compared operators with different levels of experience and quantitatively described characteristics of human manual skill and their effects on manufacturing process parameters such as cutting energy, surface finish, and material removal rate (MRR). For instance, we find that an experienced subject performs the task in a precise manner by moving the tool in complex paths, with lower applied forces and velocities, and short fixations compared to a novice. A detailed understanding of gaze-motor behavior broadens our knowledge of how a manual task is executed. Our results help to provide this extra insight, and impact future efforts in workforce training as well as the digitalization of manual expertise, thereby facilitating the transformation of raw data into product-specific knowledge.

This paper presents new techniques to analyze and understand the sensorimotor characteristics of manual operations such as grinding, and links their influence on process performance. A grinding task, though simple, requires the practitioner to combine elements from the large repertoire of his or her skillset. Based on the joint gaze, force, and velocity data collected from a series of manual grinding experiments, we have compared operators with different levels of experience and quantitatively described characteristics of human manual skill and their effects on manufacturing process parameters such as cutting energy, surface finish, and material removal rate (MRR). For instance, we find that an experienced subject performs the task in a precise manner by moving the tool in complex paths, with lower applied forces and velocities, and short fixations compared to a novice. A detailed understanding of gaze-motor behavior broadens our knowledge of how a manual task is executed. Our results help to provide this extra insight, and impact future efforts in workforce training as well as the digitalization of manual expertise, thereby facilitating the transformation of raw data into product-specific knowledge.

The APC/C-Cdh1 ubiquitin-ligase complex targets cell cycle regulators for proteosomal degradation and helps prevent tumor development and accumulation of chromosomal aberrations. Replication stress has been proposed to be the main driver of genomic instability in the absence of Cdh1, but the real contribution of APC/C-Cdh1 to efficient replication, especially in normal cells, remains unclear. Here we show that, in primary MEFs, acute depletion or permanent ablation of Cdh1 slowed down replication fork movement and increased origin activity. Partial inhibition of origin firing does not accelerate replication forks, suggesting that fork progression is intrinsically limited in the absence of Cdh1. Moreover, exogenous supply of nucleotide precursors, or ectopic overexpression of RRM2, the regulatory subunit of Ribonucleotide Reductase, restore replication efficiency, indicating that dNTP availability could be impaired upon Cdh1 loss. Indeed, we found reduced dNTP levels in Cdh1-deficient MEFs. Importantly, DNA breakage is also significantly alleviated by increasing intracellular dNTP pools, strongly suggesting that genomic instability is the result of aberrant replication. These observations highlight the relevance of APC/C-Cdh1 activity during G1 to ensure an adequate supply of dNTPs to the replisome, prevent replication stress and the resulting chromosomal breaks and, ultimately, suppress tumorigenesis.

This paper reports our progress in developing techniques for “parsing” raw gaze and force data from manual grinding tasks into a principled model. A grinding task, though simple, requires the practitioner to combine elements from the large repertoire of her skillset. Based on the joint, gaze, and force data collected from a series of experiments, and by extending existing scanpath methods, we develop a visualization method called Gaze-Motor Space-Time Cube (GMSTC), which can help us gain insight into the joint gaze-motor routine existing in complex manual tasks. For instance, there exists a strong correlation between the spectra of a subject's fixation and force distributions. Such insight might be hard to extract through an examination of either the gaze or the force data separately. Furthermore, by comparing data obtained from operators with different levels of skill, we are able to quantitatively describe characteristics of human manual skill. For instance, we find that an experienced subject exhibits longer fixation durations and smaller fixation variations than an intermediate one. A detailed understanding of gaze-motor behavior broadens our knowledge of how a manual task is executed. Our results help to provide this extra insight, and have implications in the way in which knowledge and manual expertise is transferred from one generation of practitioners to the next.

This paper reports our progress in developing techniques for “parsing” raw gaze and force data from manual grinding tasks into a principled model. A grinding task, though simple, requires the practitioner to combine elements from the large repertoire of her skillset. Based on the joint, gaze, and force data collected from a series of experiments, and by extending existing scanpath methods, we develop a visualization method called Gaze-Motor Space-Time Cube (GMSTC), which can help us gain insight into the joint gaze-motor routine existing in complex manual tasks. For instance, there exists a strong correlation between the spectra of a subject's fixation and force distributions. Such insight might be hard to extract through an examination of either the gaze or the force data separately. Furthermore, by comparing data obtained from operators with different levels of skill, we are able to quantitatively describe characteristics of human manual skill. For instance, we find that an experienced subject exhibits longer fixation durations and smaller fixation variations than an intermediate one. A detailed understanding of gaze-motor behavior broadens our knowledge of how a manual task is executed. Our results help to provide this extra insight, and have implications in the way in which knowledge and manual expertise is transferred from one generation of practitioners to the next.