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Memory-based storage and register-based storage are commonly used storagetypes in fpgas. This thesis aims to build up the architecture of memory-basedstorage and register-based storage, implement the corresponding methods, compare the difference between them and determine which kind of storage workswell under different circumstances. Algorithms for both storages are conducted,and an hdl framework is developed in Python. During the algorithm process,vhdl code for hardware architecture design is built. The number of slices usedis the standard to judge which storage is better during the synthesis process inXilinx Vivado. After several groups of syntheses, the number of slices used isobtained. Finally, the preference under different circumstances is concluded.This study shows that for most common cases, memory-based storage is better touse for its lower cost of resources. For some extreme cases, register-based storageis preferred. This thesis will provide some references for the use of storage infpga synthesis and implementation.

Memory-based storage and register-based storage are commonly used storagetypes in fpgas. This thesis aims to build up the architecture of memory-basedstorage and register-based storage, implement the corresponding methods, compare the difference between them and determine which kind of storage workswell under different circumstances. Algorithms for both storages are conducted,and an hdl framework is developed in Python. During the algorithm process,vhdl code for hardware architecture design is built. The number of slices usedis the standard to judge which storage is better during the synthesis process inXilinx Vivado. After several groups of syntheses, the number of slices used isobtained. Finally, the preference under different circumstances is concluded.This study shows that for most common cases, memory-based storage is better touse for its lower cost of resources. For some extreme cases, register-based storageis preferred. This thesis will provide some references for the use of storage infpga synthesis and implementation.