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Wordlength determination is an indispensable task in digital hardware implementations of signal processing algorithms because the wordlength affects power consumption and system performance. There is a tradeoff between power consumption and system performance when searching for the optimum wordlength. We have developed a technique of dynamically controlling the wordlength used in the signal processing algorithms of wireless orthogonal frequency-division multiplexing (OFDM) receivers. The receiver dynamically changes the wordlength on the basis of the conditions in the propagation environment while satisfying the user-required communication quality. That is, the system optimizes the wordlength while operating by sensing its own performance and gradually adjusting this wordlength to improve performance. Testing revealed that, for a packet error rate (PER) of [10.sup.-2], the application of this technique to an OFDM receiver reduces energy dissipation by 18.1%-30.2%. Index Terms--Low power, orthogonal frequency-division multiplexing (OFDM), receiver, variable wordlength, VLSI architecture, wireless communication.

This paper describes a scalable architecture for real-time speech recognizers based on word hidden Markov models (HMMs) that provide high recognition accuracy for word recognition tasks. However, the size of their recognition vocabulary is small because its extremely high computational costs cause long processing times. To achieve high-speed operations, we developed a VLSI system that has a scalable architecture. The architecture effectively uses parallel computations on the word HMM structure. It can reduce processing time and/or extend the word vocabulary. To explore the practicality of our architecture, we designed and evaluated a complete system recognizer, including speech analysis and noise robustness parts, on a 0.18-[micro]m CMOS standard cell library and field-programmable gate array. In the CMOS standard-cell implementation, the total processing time is 56.9[micro]s/word at an operating frequency of 80 MHz in a single system. The recognizer gives a real-time response using an 800-word vocabulary. Index Terms--Hidden Markov model (HMM), scalable architecture, speech recognition, VLSI implementation.