75 results on '"MINIMIZATION"'
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2. An optimization technique for the design of multiple valued PLA's
3. Two-level logic circuits using EXOR sums of products
4. Synthesis for Reed-Muller directed acyclic graph network
5. Minimising the energy of active contour model using a Hopfield network
6. Two-level minimization of multivalued functions with large offsets
7. Minimization of AND-EXOR expressions using rewrite rules
8. Managing locality sets: the model and fixed-size buffers
9. Low-complexity synthesis of incompletely specified multiple-output mod-2 sums
10. Delivery of time-critical messages using a multiple copy approach
11. Interleaving: an additional topological compaction technique for Weinberger array generation
12. On the design of cost-tables for realizing multiple-valued circuits
13. Topological via minimization revisited
14. Boolean matrix transforms for the parity spectrum and minimisation of modulo-2 canonical expansions
15. Minimal synthesis of multivalued functions with new operators
16. Dynamic motion planning of autonomous vehicles
17. Minimization algorithms for multiple-valued programmable logic arrays
18. Absolute minimization of completely specified switching functions
19. On some link distance problems in a simple polygon
20. A numerically stable reduced-gradient type algorithm for solving large-scale linearly constrained minimization problems
21. On the equivalence of cost functions in the design of circuits by costtable
22. The via minimization problem is NP-complete
23. Minimization of energy in quasi-static manipulation
24. Constrained via minimization for three-layer routing
25. MUSTANG: state assignment of finite state machines targeting multilevel logic implementations
26. An algorithm for identifying and selecting the prime implicants of a multiple-output Boolean function
27. A new framework of design rule for compaction of VLSI layouts
28. ALGORITHM 667 SIGMA - a stochastic-integration global minimization algorithm
29. On conjunctive queries containing inequalities
30. Optimization of the radiotherapy treatment plan
31. Multilevel logic minimization using implicit don't cares
32. Verification algorithms for VLSI synthesis
33. Layer assignment problem for three-layer routing
34. Generation of large-scale quadratic programs for use as global optimization test problems
35. Sparse decompositions for exploratory pattern analysis
36. Multiple-valued minimization for PLA optimization
37. A computer algorithm for minimizing Reed-Muller canonical forms
38. Modem ICs increase speed and functionality
39. Universal logic design algorithm and its application to the synthesis of two-level switching circuits
40. Tri-state map for the minimisation of exclusive-OR switching functions
41. Neural networks for routing communication traffic
42. On the convergence of one-dimensional simplex search
43. Minimizability of random Boolean functions
44. NASA proposes guidelines for acquisition streamlining
45. No head start for MR; slow rampup at Diskcon
46. SPC yields defect-free SM boards
47. Teraplex lifts a couple more veils on intriguing minimum instruction set technology
48. Microkernels are in your future
49. Wafer-Scale Integration of Systolic Arrays
50. Input Variable Assignment and Output Phase Optimization of PLA's
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