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Inductor current sensing is becoming widely used in current programmed controllers for microprocessor applications. This method exploits a low-pass filter in parallel with the inductor to provide lossless current sense. A major drawback of inductor current sensing is that accurate sense the dc and ac components of the current signal requires precise matching between the low-pass filter time constant and the inductor time constant (L/[R.sub.L]). However, matching accuracy depends on the tolerance of the components and on the operating conditions; therefore it can hardly be guaranteed. To overcome this problem, a novel digital autotuning system is proposed that automatically compensates any time constant mismatch. This autotuning system has been developed for voltage regulator module (VRM) current programmed controllers. It makes it possible to meet the adaptive voltage positioning requirements using conventional and low cost components, and to solve problems such as aging effects, temperature variations, and process tolerances as well. A prototype of the autotuning system based on a field-programmable gate array and a commercial dc/dc controller has been designed and tested. The experimental results fully confirmed the effectiveness of the proposed method, showing an improvement of the current sense precision from about 30 % up to 4%. This innovative solution is suitable to fulfill the challenging accuracy specifications required by the future VRM applications. Index Terms--Current mode control, inductor current sensing techniques, VRM.

This paper investigates a mixed-signal fixed frequency digital voltage-mode controller for dc-dc converters. Switch turn-on is determined by system clock, while switch turn-off is determined asynchronously by comparing a signal proportional to the derivative of the output voltage and the voltage ramp driven by the digital-to-analog converter (DAC). One of the most important features is that the derivative action of the proportional-integral-derivative (PID) voltage-mode controller is inherently obtained by a combination of the analog front-end and the hard-wired digital logic, without requiring the numerical computation of the derivative action nor analog reactive elements (capacitors), which are usually needed for the derivative action in the analog domain and which are critical for the IC controller integration. Moreover, as compared to conventional digital approaches based on analog-to-digital converters (ADCs) and digital pulsewidth modulators (DPWMs), the phase-lag due to the uniformly sampled DPWM and due to the output voltage sampling is avoided, thus improving phased margin at the crossover frequency where the derivative contribution is usually prevailing. This property potentially enables faster controllers with improved dynamic response, breaking bandwidth limitation of conventional digital control architectures. The proposed control architecture is also effective from the IC point of view, since it is based on a DAC, a simple analog front-end, including a sample and hold, a comparator and an operational amplifier, and low digital signal-processing requirement (~5000 gates). Simulation and experimental results on a 1.2 V-20 A synchronous buck converter confirm the properties of the proposed solution. Index Terms--DC-DC converters, mixed-signal control, point-of-load converters, voltage-mode control.

This paper investigates a mixed synchronous/asynchronous digital voltage-mode controller for DC-DC converters. In the proposed control architecture, the turn-on switching event is determined asynchronously by comparing the converter output voltage and a synchronously generated voltage ramp driven by the digital control using a low-resolution digital-to-analog converter. Switch turn-off is determined synchronously by the system clock. In the proposed approach, the derivative action of the proportional-integral-derivative voltage-mode controller is inherently obtained by the frequency modulation, without requiring the digital computation of the derivative action. A simplified small-signal model is also derived in order to analyze the performance achievable by the proposed solution. This control architecture features good dynamic performance, and frequency modulation during transients. Simulation and experimental results on a synchronous buck converter, where the digital control has been implemented in field programmable gate array, confirm the effectiveness of the proposed solution. Index Terms--Digital control, DC-DC converters, mixed-signal control, voltage-mode control.

This paper proposes a simple autotuning technique for digitally controlled dc-dc converters. The proposed approach is based on the relay feedback method and introduces perturbations on the output voltage during converter soft-start. By using an iterative procedure, the tuning of proportional-integral-derivative parameters is obtained directly by including the controller in the relay feedback and by adjusting the controller parameters based on the specified phase margin and control loop bandwidth. A nice property of the proposed solution is that output voltage perturbations are introduced while maintaining the relay feedback control on the output voltage. The proposed algorithm is simple, requires small tuning times, and it is compliant with the cost/complexity constraints of integrated digital integrated circuits. Simulation and experimental results of a synchronous buck converter and of a dc-dc boost converter confirm the effectiveness of the proposed solution. Index Terms--Controller autotuning, dc-dc converters, digital control.

This paper describes an innovative digital control architecture for low-voltage, high-current dc-dc converters, based on a combination of current-programmed control and variable frequency operation. The key feature of the proposed architecture is the low complexity: only two digital-to-analog converters (DACs) with low resolution (7-b) are used for control. An original control algorithm is used to reduce quantization effects to negligible levels, in spite of the low resolution of the DACs. Thanks to this algorithm, both static and dynamic output voltage regulation are improved with respect to traditional digital solutions. Adaptive voltage positioning and active current sharing are inherently provided by the new architecture. A detailed description of the control strategy is given with reference to a single-phase buck converter. Extension to multiphase converters is straightforward. The digital control architecture is experimentally verified on a FPGA-based four-phase prototype buck converter operating at 350 kHz/phase. Output voltage tolerance within [+ or -] 0.5 % is experimentally demonstrated, along with negligible quantization effects and fast transient response. The features and the performance of the proposed architecture make it a valuable candidate for the control of next generation voltage regulator modules. Index Terms--Current-programmed control, dc-dc switching power converters, digital control.

A single photon avalanche detector (SPAD) in planar technology is described and discussd.

Design and testing of a monolithic integrated dual-detector for photon correlation analysis is described. The main element is a single photon avalanche diode (SPAD) with low noise- and high time-resolution.

A process probe, able to measure the avalanche ignition rate of generation centers, is proposed for use in p-n junctions.

A single-photon avalanche diode detector is presented. This avalanche detector was specifically developed to produce a time response not influenced by tail effects and secondary bumps, which is achieved through the instrument's capacity for picosecond time-correlated single photon counting. Evaluation of its performance show that it produces an instrument response function with ultraclean shape and steep decay.

A high-speed silicon photodetector, compatible with very-large-scale integration technologies, is suitable for fabricating monolithic receivers for optical data link applications. The detector operates in the low-voltage range at wavelengths of 780-850 nanometers. The photodetector contains an interdigitated p-i-n detector grown on a silicon-on-insulator substrate. The fabricated devices show low dark currents, large dynamic range and small capacitance.