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In order to utilize perpendicular spin-torque-transfer magnetic-random-access-memory (p-STT MRAM) as a storage class memory, the achievement of performing multi-level-cell (MLC) operation is important in increasing the integration density of p-STT MRAM. For a double pinned perpendicular magnetic tunneling junction spin-valve performing MLC (i.e., four-resistance level) operation, the uniformity in the resistance difference between four-level resistances was investigated theoretically and experimentally. The uniformity in the resistance difference between four-level resistances was strongly dependent on the top MgO tunneling-barrier thickness. Particularly, the most uniform resistance difference between four resistance states could be achieved at a critical top-MgO tunneling thickness (i.e., ∼1.15 nm).

A perpendicular spin transfer torque (p-STT)-based neuron was developed for a spiking neural network (SNN). It demonstrated the integration behavior of a typical neuron in an SNN; in particular, the integration behavior corresponding to magnetic resistance change gradually increased with the input spike number. This behavior occurred when the spin electron directions between double Co2Fe6B2 free and pinned layers in the p-STT-based neuron were switched from parallel to antiparallel states. In addition, a neuron circuit for integrate-and-fire operation was proposed. Finally, pattern-recognition simulation was performed for a single-layer SNN.