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In this paper, a novel and practical transmission scheme for a Multiple Input Multiple Output-Orthogonal Frequency Division Multiple Access (MIMO-OFDMA) relay-based network is proposed and evaluated. We coin the term Virtual Maximum Ratio Transmission (VMRT) for the scheme which obtains diversity and array gain at both links in a two-hop transmission, while keeping the complexity low. Besides, the requirements of Channel State Information needed at the different network elements such as the Base Station, Relay Station or User Terminals are also limited, and so the feedback. The obtained global performance by using proposed VMRT outperforms other schemes. Diversity gains larger than 6 can be easily obtained with a reduced number of relays. For this reason, VMRT is a good candidate to achieve high speed transmission or increase coverage and reliability in slow varying channels for relay-based networks. [ABSTRACT FROM AUTHOR]

Nowadays, the sensor community has become wireless, increasing their potential and applications. In particular, these emerging technologies are promising for vehicles' communications (V2V) to dramatically reduce the number of fatal roadway accidents by providing early warnings. The ECMA-368 wireless communication standard has been developed and used in wireless sensor networks and it is also proposed to be used in vehicular networks. It adopts Multiband Orthogonal Frequency Division Multiplexing (MB-OFDM) technology to transmit data. However, the large power envelope fluctuation of OFDM signals limits the power efficiency of the High Power Amplifier (HPA) due to nonlinear distortion. This is especially important for mobile broadband wireless and sensors in vehicular networks. Many algorithms have been proposed for solving this drawback. However, complexity and implementations are usually an issue in real developments. In this paper, the implementation of a novel architecture based on multilayer perceptron artificial neural networks on a Field Programmable Gate Array (FPGA) chip is evaluated and some guidelines are drawn suitable for vehicular communications. The proposed implementation improves performance in terms of Peak to Average Power Ratio (PAPR) reduction, distortion and Bit Error Rate (BER) with much lower complexity. Two different chips have been used, namely, Xilinx and Altera and a comparison is also provided. As a conclusion, the proposed implementation allows a minimal consumption of the resources jointly with a higher maximum frequency, higher performance and lower complexity. [ABSTRACT FROM AUTHOR]