Search

Your search keyword '"Bibeau, W"' showing total 1 results
Start Over Author "Bibeau, W" Database Complementary Index
1 results on '"Bibeau, W"'

1. A dual-poly (n+/p+) gate, Ti-salicide, double-metal technology for submicron CMOS ASIC and logic applications.

Author

Sun, S.W., Swenson, M., Yeargain, J.R., Lee, C.-O., Swift, C., Pfiester, J.R., Bibeau, W., and Atwell, W.

Abstract

The process architecture and device characteristics of a submicrometer CMOS n+/p+ poly gate, Ti-salicide, double-metal technology are described. Tradeoffs among circuit shrinkability, device gain, and hot-carrier-injection susceptibility are discussed. This technology has been successfully implemented in a 0.8-μm unified-design-rule high-performance high-end MPU product [ABSTRACT FROM PUBLISHER]

Published
1989
Full Text
View/download PDF

Catalog

Books, media, physical & digital resources
See catalog results