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This letter reports an 85 GHz low noise amplifier (LNA) employing derivative superposition based non‐linearity cancellation and a current re‐use topology. The LNA employs a two‐stage stacked architecture, each featuring neutralized differential pairs utilizing the same DC current. In derivative superposition, an auxiliary branch consisting of neutralized differential pairs cells is added in the LNA in parallel to stage 1 to ensure non‐linearity cancellation. Layout‐based capacitive neutralization is implemented to improve GMAX, resulting in simplified routing, reduced parasitics, and a more compact layout. The proposed LNA is fabricated in TSMC 28 nm CMOS process and achieves a peak gain of 8.4 dB at 84.2 GHz with a measured 3 dB bandwidth (BW3dB$\text{BW}_{3\text{dB}}$) from 79.4 to 92 GHz. The minimum measured noise figure is 12.8 dB. The LNA draws 34 mA of DC current from a 1.2 V supply. The highly linear LNA with IIP3 +6.5 dBm is tailored for automotive RADAR and 6G receivers. [ABSTRACT FROM AUTHOR]

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A high gain D‐band hybrid integrated on‐chip antenna (OCA) based on a low‐cost printed circuit board (PCB) packaging technology is analyzed and designed in a standard 40‐nm CMOS process in this paper. The proposed OCA is a hybrid structure of a slotted patch OCA with off‐chip PCB ground and off‐chip dielectric resonator (DR). The proposed OCA exhibits a simulated gain of 3.5 dBi and 53% radiation efficiency at 150 GHz. The simulated impedance bandwidth is 20 GHz. The radiation performance and impedance bandwidth of the OCA are observably improved with the proposed techniques. The proposed OCA occupies 0.52 × 0.56 mm2, and addresses the highly desirable yet challenging overall design of future low‐cost integrated millimeter‐wave (mm‐Wave) and terahertz (THz) systems, which hit the mark on cost and compatibility. [ABSTRACT FROM AUTHOR]

A low-power single-core 24.5-to-29.1 GHz CMOS LC voltage-controlled oscillator (VCO) is presented. The proposed VCO uses an innovative differential cross-coupled architecture in which an additional pair is connected to the main pair to increase the effective transconductance, resulting in lower power consumption and reduced phase noise (PN). The proposed VCO is fabricated in a 1P9M standard CMOS process and sustains oscillation at 29.14 GHz with power consumption as low as 455 μW (650 μA from a 0.7 V supply), which is ~20% lower than a conventional CMOS LC VCO without Gm-enhanced differential pairs built through the same process (700 μA from 0.8 V supply). When consuming 880 μW (1.1 mA from 0.8 V), the proposed VCO exhibits a tuning range of 4.6 GHz (from 24.5 GHz to 29.1 GHz). Moreover, it exhibits a measured phase noise (PN) better than −106.5 dBc/Hz @ 1 MHz and −132.0 dBc/Hz @ 10 MHz, with figure-of-merit (FoM) results of 195.2 dBc/Hz and 200.3 dBc/Hz, respectively. [ABSTRACT FROM AUTHOR]

In this article, an analytical method for designing transformer matching network of millimeter‐wave (mm‐wave) low noise amplifier (LNA) is presented. In the circuit design, neutralizing capacitors (NCs) structure is used to mitigate the intrinsic gate‐drain feedback capacitance in the transistor for increasing the reverse isolation and available gain, thus allowing the common source (CS) structure can be regarded as an unilateralized active amplification part. The equivalent circuit of the active amplification part and the matching transformer network is modeled, then the analytical matching equations can be established, and the required matching transformer parameter can be determined quickly. As a proof of concept, a Ka‐band LNA operating at 37–43 GHz is designed and implemented in 65 nm complementary metal oxide semiconductor. The measured results show that the small signal gain of the circuit is 19.2–20.5 dB at 37–43 GHz. The noise figure (NF) in the operating band is 3.2–4.2 dB, and the minimum NF is 3.2 dB at 40.2 GHz. The chip area is only 0.08 mm2 excluding pads. [ABSTRACT FROM AUTHOR]

This paper presents the implementation of a low-power and variable-gain 60 GHz millimeter-wave CMOS Amplifier designed for short-range multi-gigabit close proximity point-to-point communications. The design uses coplanar wave transmission lines to achieve 50 Ω input and output matching. Realized in a 90 nm CMOS process, the variable-gain VGA exhibits power consumption ranging from 4.7 mW to 39.1 mW, with gains spanning from 5.5 dB to 12.4 dB at 60 GHz and a 3 dB bandwidth exceeding 14.4 GHz. Input and output return losses remain below –10 dB across the gain spectrum. Successful demonstration of gain controllability further validates the circuit's performance. The compact VGA die, inclusive of pads, has dimensions of 740 μm by 920 μm, thereby occupying a core area of 0.2 mm2. This design demonstrates the potential of low-power, high-performance VGAs in enhancing millimeter-wave communication systems. [ABSTRACT FROM AUTHOR]

This work presents a novel trusted LC voltage-controlled oscillator (VCO) with an embedded compact analog Physically Unclonable Function (PUF) used for authentication. The trusted VCO is implemented in a 1P9M 65 nm standard CMOS process and consumes 1.75 mW. It exhibits a measured phase noise (PN) of −104.8 dBc/Hz @ 1 MHz and −132.2 dBc/Hz @ 10 MHz offset, resulting in Figures of Merit (FoMs) of 191.7 dBc/Hz and 199.1 dBc/Hz, respectively. With the measured frequency tuning range (TR) of ~5.5 GHz, the FoM with tuning (FoMT) reaches 197.6 dBc/Hz and 205.0 dBc/Hz at 1 MHz and 10 MHz offset, respectively. The analog PUF consists of CMOS cross-coupled pairs in the main VCO to change analog characteristics. Benefiting from the impedance change and parasitic capacitance of the cross-coupled pairs, the AC and DC responses of the VCO are utilized for multiple responses for each input. The PUF consumes 0.83 pJ/bit when operating at 1.5 Gbps. The proposed PUF exhibits a measured Inter-Hamming Distance (HD) of 0.5058b and 0.4978b, with Intra-HD reaching 0.0055b and 0.0053b for the current consumption and fosc, respectively. The autocorrelation function (ACF) of 0.0111 and 0.0110 is obtained for the current consumption and fosc, respectively, at a 95% confidence level. [ABSTRACT FROM AUTHOR]

The traditional rat-race coupler comprises a quarter-wavelength transmission line and a three-quarter-wavelength transmission line. In this design, the slow-wave structure transmission line is employed to replace the conventional quarter-wavelength transmission line, and the three-quarter-wavelength transmission line is substituted with the left-handed transmission line. By using the TSMC CMOS 90 nm fabrication process, a circuit is created with a chip size of 300 μm × 200 μm, corresponding to the electrical size at 39 GHz of 0.039 λ 0 × 0.026 λ 0 . The measured results demonstrate that the operating bandwidth is 35 to 43 GHz, with an amplitude imbalance of around 0 dB, a phase error within 1°, a return loss of less than 26 dB, and an isolation better than 40 dB. [ABSTRACT FROM AUTHOR]

An optimized millimeter-wave digital controlled oscillator (DCO) in a 40-nm CMOS process is presented in this work. The coarse-tuning modules and medium-tuning modules of the DCO utilize modified binary-weighted digitally controlled transmission lines (DCTLs) to achieve a better compromise among smaller chip size, higher resonant frequency, better tuning resolution and lower phase noise. The tuning precision and die size of the medium tuning bank are improved without changing the binary coding rules by replacing the lowest-weight bit of the DCTLs with switched capacitors. In comparison with traditional DCTLs, the control bits of the coarse and medium tuning modules have been changed from 30 to 8, resulting in a 34.4% reduction in overall length (from 122 μ m to 80 μ m). In addition, the DCO's fine-tuning modules are achieved using a binary-weighted switched capacitors array connected to the secondary winding of a low-coupling transformer, which enhances the DCO's fine-tuning bank for better frequency resolution with less circuit complexity. The measured tuning range of the optimized DCO is 76-81GHz with a smaller die size of 0.12mm 2 . This results in an outstanding figure of merit ( F o M A ) of − 190.52dBc/Hz. [ABSTRACT FROM AUTHOR]