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It is very important to develop effective strategies for process industry to implement feasible scheduling while the process bottlenecks work optimally. However, the bottlenecks adopted by the existed scheduling strategies are often partial bottlenecks, local bottlenecks, or even deceptive bottlenecks, which are basically not key constraints to achieve optimal objective, so that the corresponding scheduling strategies are not perfect, and the further improvement and evaluation can hardly be proposed. So, it is a valuable issue to analyze the bottlenecks both in academic and engineering fields. This paper aims at the minimum cost problem of generalized network flow model to define and analyse three classes of bottlenecks based on generalized network simplex algorithm, and the corresponding search algorithms are proposed in this paper. The obtained bottlenecks cannot only be used to determine whether the object cost will be increased or decreased, but also be used to propose the corresponding strategy to evaluate the improvement on the network flow model for scheduling. Finally, a typical example is discussed. [Copyright &y& Elsevier]

The basis of the autonomous driving system of the micro-vehicles based on simple visual is the road element detection. Based on the lack of the micro-vehicles processing capacity and the real-time requirements of the detection and control algorithms, the paper proposed a new feature extraction and tracking algorithm based on the pixel data blocks. We use the fixed OTSU threshold image binarization to reduce the impact of light. The detection experiments show that the rapid structural road elements detection(RSRED) algorithm can extract the lane markings, road signs, zebra crossings and other road elements against the interference of light, shelter, pollution and the vehicle speed definitely influence over detection rate of road elements. Finally the Lane-kepping and Overtaking experiments show that the algorithm is efficient and stable. [ABSTRACT FROM AUTHOR]

A low on-resistance (Ron, sp) integrable silicon-on-insulator (SOI) n-channel lateral double-diffused metal-oxide- semiconductor (LDMOS) is proposed and its mechanism is investigated by simulation. The LDMOS has two features: the integration of a planar gate and an extended trench gate (double gates (DGs)); and a buried P-layer in the N-drift region, which forms a triple reduced surface field (RESURF) (TR) structure. The triple RESURF not only modulates the electric field distribution, but also increases N-drift doping, resulting in a reduced specific on-resistance (Ron, sp) and an improved breakdown voltage (BV) in the off-state. The DGs form dual conduction channels and, moreover, the extended trench gate widens the vertical conduction area, both of which further reduce the Ron, sp. The BV and Ron, sp are 328 V and 8.8 m&ohmega;.cm2, respectively, for a DG TR metal-oxide-semiconductor field-effect transistor (MOSFET) by simulation. Compared with a conventional SOI LDMOS, a DG TR MOSFET with the same dimensional device parameters as those of the DG TR MOSFET reduces Ron, sp by 59% and increases BV by 6%. The extended trench gate synchronously acts as an isolation trench between the high-voltage device and low-voltage circuitry in a high-voltage integrated circuit, thereby saving the chip area and simplifying the fabrication processes. [ABSTRACT FROM AUTHOR]