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• New materials and novel device architectures. • End of the Roadmap. • Multigate NanoCMOS and Nanowire FET. • Small slope switches Tunnel FET and FE-FET. • Hybrid nanoscale transistors. • Alternative materials ultra-thin Si-Ge-III-V/OI, 2D, 1D, Heterostructures. Future Nanoelectronic devices faces substantial challenges, in particular increased power consumption, saturation of performance, large variability and reliability limitation. In this respect, novel materials and innovative device architectures will be needed for Nanoscale FETs. This paper presents some promising solutions for the end of the roadmap with Multigate Nanodevices, Nanowires, Tunnel transistors, Ferroelectric FET, and Hybrid Nanocomponents using Phase Change materials or nanofilament. Other alternative materials, as ultra-thin films, 2D and 1D nanostructures, Heterostructures using strained or III-V materials, will also allow to boost these advanced nanotransistors. [ABSTRACT FROM AUTHOR]

Abstract: In this paper, an overview of recently explored or discovered new effects in advanced SOI devices and materials is given. The impact of key device parameters on electrical and thermal floating body effects is addressed for various device architectures (PD and FD SOI, FinFETs, different buried insulators, etc.). Recent advances in the understanding of the sensitivity of electron and hole transport to the tensile or compressive uniaxial and biaxial strains in thin film SOI are shown. The performance and physical mechanisms are also reviewed in multi-gate Si, SiGe and Ge MOSFETs. New hot carrier phenomena are discussed. Finally, the impact of gate misalignment or underlap, as well as the use of the back gate for charge storage in double-gate nanodevices and of capacitorless DRAM are outlined. [Copyright &y& Elsevier]

A theoretical analysis of the carrier mobility in organic transistors is presented. We noticed that the assumption of zero potential at open/quasi-free surface may cause a large deviation of the areal charge density in the organic film, greater in thinner-film transistors. Taking into account this effect, the effective mobility is obtained using the Kubo-Greenwood integral, which provides the total conductivity in the band and thus in the whole organic film. The mobility is studied with respect to gate voltage and temperature, for various disorder and transport diffusivity levels, enabling a better insight of the carrier mobility in organic transistors. [ABSTRACT FROM AUTHOR]

Joule's law opens a straightforward way to explore the operating mechanism of organic field-effect transistors, from the angle of inner transported heating. The microscopic dissipated power is calculated from the local conductivity and electric field, which solves the widespread difficulties in building a macroscopic model to determine the contact resistance. The result quantitatively discloses the correlation between the contact resistance and the charge transport properties covering energetic disorder, band-like and hopping transport as well as carrier mobility anisotropy. It turns out that in a staggered configuration with ideal Ohmic contact, the contact resistance is highly affected by the charge transport. [ABSTRACT FROM AUTHOR]

Unreliable mobility values, and particularly greatly overestimated values and severely distorted temperature dependences, have recently hampered the development of the organic transistor field. Given that organic field‐effect transistors (OFETs) have been routinely used to evaluate mobility, precise parameter extraction using the electrical properties of OFETs is thus of primary importance. This review examines the origins of the various mobilities that must be determined for OFET applications, the relevant extraction methods, and the data selection limitations, which help in avoiding conceptual errors during mobility extraction. For increased precision, the review also discusses device fabrication considerations, calibration of both the specific gate‐dielectric capacitance and the threshold voltage, the contact effects, and the bias and temperature dependences, which must actually be handled with great care but have mostly been overlooked to date. This review serves as a systematic overview of the OFET mobility extraction process to ensure high precision and will also aid in improving future research. [ABSTRACT FROM AUTHOR]

A study of carrier transport in top-gate and bottom-contact TIPS-pentacene organic field-effect transistors (OFETs) based on mobility is presented. Among three mobilities extracted by different methods, the low-field mobility obtained by the Y function exhibits the best reliability and ease for use, whereas the widely applied field-effect mobility is not reliable, particularly in short-channel transistors and at low temperatures. A detailed study of contact transport reveals its strong impact on short-channel transistors, suggesting that a more intrinsic transport analysis is better implemented in relatively longer-channel devices. The observed temperature dependences of mobility are well explained by a transport model with Gaussian-like diffusivity band tails, different from diffusion in localized states band tails. This model explicitly interprets the non-zero constant mobility at low temperatures and clearly demonstrates the effects of disorder and hopping transport on temperature and carrier density dependences of mobility in organic transistors. [ABSTRACT FROM AUTHOR]

A modeling of organic field-effect transistors' (OFETs') electrical characteristics is presented. This model is based on a one-dimensional (1-D) Poisson's equation solution that solves the potential profile in the organic semiconducting film. Most importantly, it demonstrates that, due to the common open-surface configuration used in organic transistors, the conduction occurs in the film volume below threshold. This is because the potential at the free surface is not fixed to zero but rather rises also with the gate bias. The tail of carrier concentration at the free surface is therefore significantly modulated by the gate bias, which partially explains the gate-voltage dependent contact resistance. At the same time in the so-called subthreshold region, we observe a clear charge trapping from the difference between C-V and I-V measurements; hence a traps study by numerical simulation is also performed. By combining the analytical modeling and the traps analysis, the questions on the C-V and I-V characteristics are answered. Finally, the combined results obtained with traps fit well the experimental data in both pentacene and bis(triisopropylsilylethynyl)-pentacene OFETs. [ABSTRACT FROM AUTHOR]

The silicon dioxide/silicon nitride/silicon dioxide (ONO) inter-gate dielectric layer has long been used in floating gate flash memories to provide coupling with the control gate, while simultaneously blocking leakage to it. Given the thickness and quality of the ONO, it is not possible to directly measure the leakage currents at low electric fields. This article presents the Oxide Stress Separation (OSS) technique which places a flash cell in a condition where the potential drop occurs entirely across the ONO. This allows for the measurement of currents on the order of 10 − 23 A to be measured at low electric fields using nominal floating gate flash memory cells. Using OSS, state-of-the-art 40 nm embedded-flash memories are characterized, allowing an evaluation of data retention contributors. Comparing OSS results with bake tests, ONO is found to be minimally responsible for the data retention drift, even in modern memories. [ABSTRACT FROM AUTHOR]

Inspired by the silicide technology in manufacturing silicon devices and the ongoing lack of knowledge on post-metallization annealing in realizing oxide devices, we investigated post-contact annealing for solution-processed InGaZnO transistors. Low-temperature annealing in air is found to significantly improve device uniformity, reproducibility, and subthreshold charge transport. However, this method is highly dependent on the employed contact metal. Detailed examination of devices using Al, Au, and Cu reveals that the physics of a metal/semiconductor interface is vital to its post-anneal response, which results in distinct device characteristics. Our results provide clues to better understand oxide transistors and to optimize their performance. [ABSTRACT FROM AUTHOR]

Highlights: [•] Contact metallization greatly influences the charge injection. [•] Slow deposition of Au introduces high-density of traps into semiconductor bulk. [•] Fast deposition of Au causes Schottky-like injection due to its thermal attack. [•] Stable Ohmic injection in Cu-contacts is ensured by ultra-thin oxide interlayer. [•] Combined static and noise data provide quantitative insights into such dependences. [ABSTRACT FROM AUTHOR]

Highlights: [•] Optimal contacts should have smallest size but possess minimum contact effects. [•] Six times of semiconductor film thickness is found to be optimal for contact length. [•] It increases in nanoscale channels with more hopping and anisotropic transport. [•] This optimal contact length is independent of semiconductors and variable mobility. [ABSTRACT FROM AUTHOR]

Abstract: A new parameter extraction methodology based on split C–V is proposed for FDSOI MOS devices. To this end, a detailed capacitance theoretical analysis is first conducted emphasizing the usefulness of the Maserjian function. Split C–V measurements carried out on various FDSOI CMOS technologies show that the Maserjian function exhibits a power law dependence with inversion charge as ∝Qi−2 whatever the carrier type and gate oxide thickness. This feature enables to confirm the validity of a two-parameter simple capacitance model and allows for a reliable MOSFET parameter extraction in FDSOI devices. [Copyright &y& Elsevier]

Abstract: Gate-to-channel capacitance C gc(Vg ) data obtained on FD-SOI MOS devices with gate lengths down to 35nm are first reported. Thus, a 2D numerical simulation procedure allowing to calculate the total device capacitance and parasitic capacitances is developed. This enabled us to discriminate the respective contributions of all parasitic components such as spacer, overlap, inner fringe and buried oxide capacitances in the structure. [Copyright &y& Elsevier]

Abstract: A development of the conventional transfer-length method (TLM) for organic transistors’ contact resistance evaluation is proposed. By adding the dissipated power in access resistance and in the channel, we found that TLM can be extended to the non-linear region, i.e., up to saturation regime, which is widely believed to be a barrier for TLM application now. To improve the extraction accuracy and stability, a modified TLM version is used for the operation at small gate voltages. This modified power TLM is applied to polymer and pentacene field-effect transistors and proved as a useful tool for the contact resistance evaluation as a function of gate and drain voltages from common current–voltage characterizations. [Copyright &y& Elsevier]

Abstract: Measurements of power spectral density (PSD) of low-frequency noise (LFN) in pentacene field-effect transistors reveal the preponderance of a 1/f-type PSD behavior with the amplitude varying as the squared transistor gain and increasing as the inverse of the gate surface area. Such features impose an interpretation of LFN by carrier number fluctuations model involving capture/release of charges on traps uniformly distributed over the gate surface. The surface slow trap density extracted by the noise analysis is close to the surface states density deduced independently from static I(V) data, which confirms the validity of the proposed LFN interpretation. Further, we found that the trap densities in bottom-contact (BC) devices were higher than in their top-contact (TC) counterparts, in agreement with observations of a poorer crystal structure of BC devices, in the contact regions in particular. At the highest bias the noise originating from the contact resistance is also shown to be a dominant component in the PSD, and it is well explained by the noise originating from a gate-voltage dependent contact resistance. A gate area scaling was also performed, and the good scaling and the dispersion at the highest bias confirm the validity of the applied carrier number fluctuations model and the predominant contact noise at high current intensities. [Copyright &y& Elsevier]

The scaling of the front gate oxide thickness in SOI devices has resulted in gate-induced Floating Body effect observed for the first time in 0.13μm SOI CMOS technologies with ultra-thin gate oxide (sub-2 nm). We give an overview of this new kind of Floating Body effect. Moreover, with SOI to be adapted as a mainstream technology in the forthcoming years, two issues are still of a critical interest regarding circuit applications: low frequency noise behavior and hot-carrier reliability in state-of-the-art SOI MOSFETs. Both are thoroughly investigated in advanced SOI devices in this paper. [Copyright &y& Elsevier]

Low frequency noise characterization of 0.12 μm silicon-on-insulator (SOI) CMOS technology is for the first time performed for partially and fully depleted N-MOSFETs. Static performances of the experimental devices are first presented, then we address the drain current fluctuations in both linear and saturation regimes. Taking into consideration the usually admitted 1/f noise models in MOS devices and their applicability in our case, we point out an enhancement of the extracted trap densities for both architectures compared to previously obtained results in 0.25 μm SOI CMOS technology. As regards drain current spectral densities in saturation mode, we notice some peculiarities occurring for the Kink-related excess noise. [Copyright &y& Elsevier]

Investigates hot-carrier effects (HCE) induced by the parasitic bipolar transistor (PBT) action in deep submicron N-channel silicon-on-insulator (SOI) metal oxide semiconductor field-effect transistors (MOSFET). Experimental details; Experimental results and numerical simulations; Conclusion.

Charge Carrier Mobility: Precise Extraction of Charge Carrier Mobility for Organic Transistors (Adv. Funct. Keywords: mobility; organic transistors; parameter extraction; reliability EN mobility organic transistors parameter extraction reliability 1 1 1 05/18/20 20200515 NES 200515 Charge carriers (electrons and holes) transport in between the source and drain electrodes in an organic transistor, which is the building block of organic circuits. Mobility, organic transistors, parameter extraction, reliability. [Extracted from the article]

The reliability of mobility has come to be a critical issue to the development of new electronics especially for organic electronics, since mobility is typically extracted from field‐effect transistors containing various extrinsic effects and overestimation is popular in the literature. Recently, this issue is emphasized and a reliability factor (r) is proposed by pioneers to gauge the mobility reported. Albeit many factors discussed, how much the extrinsic effects influence r remains unrevealed and a facile solution by using organic transistors is still lacking. Here, it is shown that the widely used extraction method based on the saturation transfer characteristics is sensitive to contact effect and temperature with r dropping to 43%, indeed leading to large mobility overestimation. By contrast, the linear‐regime methods are more reliable particularly the Y‐function method that demonstrates great reliability (r ≈ 100%) even for short‐channel transistors at ultralow temperatures. In addition, operating in saturation regime induces ambipolar conduction further deteriorating reliability if contact doping is absent. High Schottky barriers, on the other side, distort device characteristics making extraction impossible. The results of this study reveal that, aside from device optimizations, selecting a right method is essential for reliable and precise evaluation of the carrier mobility by using organic transistors. This paper systematically addresses the essential effects on the mobility extraction reliability. The effects related to specific dielectric capacitance, operating regime, channel length, temperature, ambipolar conduction, and Schottky barrier are examined in a quantitative way. The results of this study show that, aside from device optimizations, selecting a proper extraction method is important to reliable mobility evaluation using organic transistors. [ABSTRACT FROM AUTHOR]