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Abstract: Many man-made objects are composed of a number of some simple geometric shapes such as lines, circles, rectangles, etc. Therefore, the detection of rectangular objects is an important issue to some practical applications such as the detection of buildings and vehicles in aerial imagery, the detection of license plates in car images, etc. Several methods have been proposed for solving the problem of the detection of rectangular objects. While some approaches are based on the detecting lines, some approaches are based on the Hough transform. Each approach has its own advantages and disadvantages (e.g., computational load). In this paper, we propose a class of neural networks with a special type of neural junctions for the detection of rectangular objects. The proposed neural networks can be trained in either an unsupervised mode or a batch mode. In contrast to some popular clustering algorithms such as the fuzzy -means algorithm and the fuzzy -rectangular shells algorithm, our approach is not based on minimizing an objective function but based on the idea of competitive learning. Based on the idea of competitive learning, the computational load can be decreased. Several data sets were tested to illustrate the effectiveness of our proposed approach. [Copyright &y& Elsevier]

Abstract: Automatic birdsong recognition using prediction-based singleton-type recurrent neural fuzzy networks (SRNFNs) is proposed in this paper. The recognition task consists of two stages. The first stage segments a significant portion from a birdsong sequence and the second stage performs recognition. For birdsong segmentation, an easy but effective segmentation approach based on time domain energy is proposed. For recognition, the linear predictive coding (LPC) coefficients of each frame in a segmented birdsong are extracted and used as features. These features are fed as inputs to SRNFN recognizers. The SRNFN is constructed by recurrent fuzzy if–then rules with fuzzy singletons in the consequences, and its recurrent aspect makes it suitable for processing patterns with temporal characteristics. In birdsong recognition, the sample prediction technique is used, where one SRNFN is responsible for learning the temporal birdsong relationships of only one species. The prediction error of each SRNFN is then used as a criterion for recognition. Experiments with 10 species of birds and their songs are performed, and a high recognition rate is achieved. Comparisons with a Takagi–Sugeno–Kang (TSK)-type recurrent fuzzy network (TRFN) and backpropagation neural network are also made in the experiments. [Copyright &y& Elsevier]

Abstract: Several implementations of Feedforward Neural Networks have been reported in scientific papers. These implementations do not allow the direct use of off-line trained networks. Usually, the problem is the lower precision (compared to the software used for training) or modifications in the activation function. In the present work, a hardware solution called Artificial Neural Network Processor, using a FPGA, fits the requirements for a direct implementation of Feedforward Neural Networks, because of the high precision and accurate activation function that were obtained. The resulting hardware solution is tested with data from a real system to confirm that it can correctly implement the models prepared off-line with MATLAB. [Copyright &y& Elsevier]

Abstract: This article presents a series of hardware implementations of a general regression neural network (GRNN) using FPGAs. The paper describes the study of this neural network using different fixed and floating point implementations. The implementation includes training as well as testing of the network. It is focused on precision loss and area and speed results of the resulting neural network coprocessor that can be used in a System on Programmable Chip. A GRNN is able to approximate functions and it has been used in control, prediction, fault diagnosis, engine management among others. They are mainly implemented as software entities because they require a great amount of complex mathematical operations. With the increasing power and capabilities of current FPGAs, now it is possible not only to translate them into hardware but, due to the reconfigurable feature of these devices, to explore different hardware/software partitions as well. These hardware implementations increase both the speed and performance of these neural networks and the designer can select the area–speed trade-off that best fits the application. [Copyright &y& Elsevier]

Abstract: In this paper, a model is considered to describe the dynamics of a class of non-autonomous neural networks with time-varying delays. By applying the properties of M-matrix, the techniques of inequality analysis and the Banach fixed point theorem, we obtain a series of new criteria on the dissipativity and existence of periodic attractor. Our results can extend and improve earlier ones. [Copyright &y& Elsevier]

Abstract: This paper proposes a new algorithm for a class of binary images thinning by using two PCNNs (pulse coupled neural networks). Once the travelling pulses of the two PCNNs meet, the thinning result is obtained. The criterion of pulses meeting is given, and the parameters of the PCNNs are also specified, which make the implementation of the proposed thinning algorithm easier. The algorithm is used to thin such a class of binary images, which separate the original images into two regions, as circularity-like images and ribbon-like shapes. Experimental results show that the proposed algorithm is efficient in extracting the skeleton of images (such as circularity-like images, ribbon-like shapes, handwriting ‘0’, etc.). [Copyright &y& Elsevier]

This paper presents architectures for comparator trees capable of finding the minimum value of a large number of inputs. Such circuits are of general applicability although the intended application for which the circuits were designed is the winner-take-all function of a digital implementation of a neural network based on the self organising map. Mechanisms for reducing delay based on look-ahead logic within individual comparators and mechanisms based on multiplexor architectures of a comparator are compared for both propagation delay and area. [Copyright &y& Elsevier]