Search

This book constitutes selected, revised and extended papers of the 15th International Conference on Evaluation of Novel Approaches to Software Engineering, ENASE 2020, held in virtual format, in May 2020.The 19 revised full papers presented were carefully reviewed and selected from 96 submissions. The papers included in this book contribute to the understanding of relevant trends of current research on novel approaches to software engineering for the development and maintenance of systems and applications, specically with relation to: model-driven software engineering, requirements engineering, empirical software engineering, service-oriented software engineering, business process management and engineering, knowledge management and engineering, reverse software engineering, software process improvement, software change and configuration management, software metrics, software patterns and refactoring, application integration, software architecture, cloud computing, and formalmethods.

This book constitutes the refereed proceedings of the 10th International Symposium on Parallel Architectures, Algorithms and Programming, PAAP 2019, held in Guangzhou, China, in December 2019.The 39 revised full papers and 8 revised short papers presented were carefully reviewed and selected from 121 submissions. The papers deal with research results and development activities in all aspects of parallel architectures, algorithms and programming techniques.

This open access book constitutes the refereed proceedings of the 16th International Annual Conference on Cyber Security, CNCERT 2020, held in Beijing, China, in August 2020. The 17 papers presented were carefully reviewed and selected from 58 submissions. The papers are organized according to the following topical sections: access control; cryptography; denial-of-service attacks; hardware security implementation; intrusion/anomaly detection and malware mitigation; social network security and privacy; systems security.

This book constitutes the refereed proceedings of the 19th International Conference on CParallel and Distributed Computing, Applications and Technologies, PDCAT 2018, held in Jeju Island, South Korea, in August 2018. The 35 revised full papers presented along with the 14 short papers and were carefully reviewed and selected from 150 submissions. The papers of this volume are organized in topical sections on wired and wireless communication systems, high dimensional data representation and processing, networks and information security, computing techniques for efficient networks design, electronic circuits for communication systems.

This book constitutes the refereed proceedings of the 10th International Conference on Supercomputing, ISUM 2019, held in Monterrey, Mexico, in March 2019.The 25 revised full papers presented were carefully reviewed and selected from 78 submissions. The papers are organized in topical sections on HPC architecture, networks, system software, algorithmic techniques, modeling and system tools, clouds, distributed computing, big data, data analytics, visualization and storage, applications for science and engineering, and emer- ging technologies.

This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017. The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

This book constitutes the refereed proceedings of the 22nd CCF Conference on Computer Engineering and Technology, NCCET 2018, held in Yinchuan, China, in August 2018.The 17 full papers presented were carefully reviewed and selected from 120 submissions. They address topics such as processor architecture; application specific processors; computer application and software optimization; technology on the horizon.

This book constitutes the refereed proceedings of the 23rd CCF Conference on Computer Engineering and Technology, NCCET 2019, held in Enshi, China, in August 2019. The 21 full papers presented were carefully reviewed and selected from 87 submissions. They address important and emerging challenges in the field of computer engineering and technology.

This book constitutes the proceedings of the workshops of the 23rd International Conference on Parallel and Distributed Computing, Euro-Par 2017, held in Santiago de Compostela. Spain in August 2017. The 59 full papers presented were carefully reviewed and selected from 119 submissions.Euro-Par is an annual, international conference in Europe, covering all aspects of parallel and distributed processing. These range from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-edged applications, from architecture, compiler, language and interface design and implementation to tools, support infrastructures, and application performance aspects.

VECPAR is a series of international conferences dedicated to the promotion and advancement of all aspects of high-performance computing for computational science, as an industrial technique and academic discipline, extending the fr- tier of both the state of the art and the state of practice. The audience for and participants in VECPAR are seen as researchers in academic departments, g- ernment laboratories and industrial organizations. There is now a permanent website for the series, http://vecpar.fe.up.pt, where the history of the conf- ences is described. ThesixtheditionofVECPARwasthe?rsttimetheconferencewascelebrated outside Porto – at the Universitad Politecnica de Valencia (Spain), June 28–30, 2004. The whole conference programme consisted of 6 invited talks, 61 papers and26posters,outof130contributionsthatwereinitiallysubmitted.Themajor themes were divided into large-scale numerical and non-numerical simulations, parallel and grid computing, biosciences, numerical algorithms, data mining and visualization. This postconference book includes the best 48 papers and 5 invited talks presented during the three days of the conference. The book is organized into 6 chapters, with a prominent position reserved for the invited talks and the Best Student Paper. As a whole it appeals to a wide research community, from those involved in the engineering applications to those interested in the actual details of the hardware or software implementations, in line with what, in these days, tends to be considered as computational science and engineering (CSE).

The 5th edition of the VECPAR series of conferences marked a change of the conference title. The full conference title now reads VECPAR 2002 — 5th Int- national Conference on High Performance Computing for Computational S- ence. This re?ects more accurately what has been the main emphasis of the conference since its early days in 1993 – the use of computers for solving pr- lems in science and engineering. The present postconference book includes the best papers and invited talks presented during the three days of the conference, held at the Faculty of Engineering of the University of Porto (Portugal), June 26–28 2002. The book is organized into 8 chapters, which as a whole appeal to a wide research community, from those involved in the engineering applications to those interested in the actual details of the hardware or software implementation, in line with what, in these days, tends to be considered as Computational Science and Engineering (CSE). The book comprises a total of 49 papers, with a prominent position reserved for the four invited talks and the two?rst prizes of the best student paper competition.

The Second International Conference on High-Performance Computing and Appli- tions (HPCA 2009) was a follow-up event of the successful HPCA 2004. It was held in Shanghai, a beautiful, active, and modern city in China, August 10–12, 2009. It served as a forum to present current work by researchers and software developers from around the world as well as to highlight activities in the high-performance c- puting area. It aimed to bring together research scientists, application pioneers, and software developers to discuss problems and solutions and to identify new issues in this area. This conference emphasized the development and study of novel approaches for high-performance computing, the design and analysis of high-performance - merical algorithms, and their scientific, engineering, and industrial applications. It offered the conference participants a great opportunity to exchange the latest research results, heighten international collaboration, and discuss future research ideas in HPCA. In addition to 24 invited presentations, the conference received over 300 contr- uted submissions from over ten countries and regions worldwide, about 70 of which were accepted for presentation at HPCA 2009. The conference proceedings contain some of the invited presentations and contributed submissions, and cover such research areas of interest as numerical algorithms and solutions, high-performance and grid c- puting, novel approaches to high-performance computing, massive data storage and processing, hardware acceleration, and their wide applications.

1 The International Workshop on Recon?gurable Computing (ARC) started in 2005 in Algarve, Portugal. The major motivation was to create an event where on-going research e?orts as well as more elaborated, interesting and hi- quality work on applied recon?gurable computing could be presented and d- cussed. Over the last couple of years recon?gurable computing has become a we- known and established research area producing interesting as well as important results in both general and embedded computing systems. It is also getting more and more interest from industry which is attracted by the (design and development)?exibility as well as the performance improvements that can be expected from this technology. As recon?gurablecomputing has blurred the gap between software and hardware, some even speak of a radical new programming paradigm opening a new realm of unseen applications and opportunities. The logo of the ARC workshop is the Nonius, a measurement instrument used in the Portuguese period of discoveries that was invented by Pedro Nunes, a Portuguesemathematician. As the logo suggests,the main motto of ARC is to help to navigate the world of recon?gurable computing. Driven by this motto, we hope ARC contributes to solid advances on recon?gurable computing.

This book constitutes the refereed proceedings of the Third International Conference on Dynamic Data Driven Application Systems, DDDAS 2020, held in Boston, MA, USA, in October 2020. The 21 full papers and 14 short papers presented in this volume were carefully reviewed and selected from 40 submissions. They cover topics such as: digital twins; environment cognizant adaptive-planning systems; energy systems; materials systems; physics-based systems analysis; imaging methods and systems; and learning systems.

This book constitutes the refereed proceedings of the 13th Conference on Advanced Computer Architecture, ACA 2020, held in Kunming, China, in August 2020. Due to the COVID-19 pandemic the conference was held online. The 24 revised full papers presented were carefully reviewed and selected from 105 submissions. The papers of this volume are organized in topical sections on: interconnection network, router and network interface architecture; accelerator-based, application-specific and reconfigurable architecture; processor, memory, and storage systems architecture; model, simulation and evaluation of architecture; new trends of technologies and applications.

This book constitutes the proceedings of the 33rd International Conference on Architecture of Computing Systems, ARCS 2020, held in Aachen, Germany, in May 2020.• The 12 full papers in this volume were carefully reviewed and selected from 33 submissions. 6 workshop papers are also included. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from embedded and real-time systems all the way to large-scale and parallel systems. The selected papers focus on concepts and tools for incorporating self-adaptation and self-organization mechanisms in high-performance computing systems. This includes upcoming approaches for runtime modifications at various abstraction levels, ranging from hardware changes to goal changes and their impact on architectures, technologies, and languages.•The conference was canceled due to the COVID-19 pandemic.

This book constitutes the proceedings of the 32nd International Conference on Architecture of Computing Systems, ARCS 2019, held in Copenhagen, Denmark, in May 2019. The 24 full papers presented in this volume were carefully reviewed and selected from 40 submissions. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from embedded and real-time systems all the way to large-scale and parallel systems. The selected papers are organized in the following topical sections: Dependable systems; real-time systems; special applications; architecture; memory hierarchy; FPGA; energy awareness; NoC/SoC. The chapter'MEMPower: Data-Aware GPU Memory Power Model'is open access under a CC BY 4.0 license at link.springer.com.

This book constitutes the refereed proceedings of the 19th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2019, held in Pythagorion, Samos, Greece, in July 2019.The 21 regular papers presented were carefully reviewed and selected from 55 submissions. The papers are organized in topical sections on system design space exploration; deep learning optimization; system security; multi/many-core scheduling; system energy and heat management; many-core communication; and electronic system-level design and verification. In addition there are 13 papers from three special sessions which were organized on topics of current interest: insights from negative results; machine learning implementations; and European projects.

This book constitutes the refereed proceedings of the 34th International Conference on High Performance Computing, ISC High Performance 2019, held in Frankfurt/Main, Germany, in June 2019.The 17 revised full papers presented were carefully reviewed and selected from 70 submissions. The papers cover a broad range of topics such as next-generation high performance components; exascale systems; extreme-scale applications; HPC and advanced environmental engineering projects; parallel ray tracing - visualization at its best; blockchain technology and cryptocurrency; parallel processing in life science; quantum computers/computing; what's new with cloud computing for HPC; parallel programming models for extreme-scale computing; workflow management; machine learning and big data analytics; and deep learning and HPC.

This book contains selected papers from the 7th International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures, ADMS 2016, and the 4th International Workshop on In-Memory Data Management and Analytics, IMDM 2016, held in New Dehli, India, in September 2016. The joint Workshops were co-located with VLDB 2016. The 9 papers presented were carefully reviewed and selected from 18 submissions. They investigate opportunities in accelerating analytics/data management systems and workloads (including traditional OLTP, data warehousing/OLAP, ETL streaming/real-time, business analytics, and XML/RDF processing) running memory-only environments, using processors (e.g. commodity and specialized multi-core, GPUs and FPGAs, storage systems (e.g. storage-class memories like SSDs and phase-change memory), and hybrid programming models like CUDA, OpenCL, and Open ACC. The papers also explore the interplay between overall system design, core algorithms, query optimization strategies, programming approaches, performance modeling and evaluation, from the perspective of data management applications.

This book constitutes the refereed proceedings of the 32nd International Conference, ISC High Performance 2017, held in Frankfurt, Germany, in June 2017. The 22 revised full papers presented in this book were carefully reviewed and selected from 66 submissions. The papers cover the following topics: applications and algorithms; proxy applications; architecture and system optimization; and energy-aware computing.

This book constitutes the refereed proceedings of the 17th International Symposium on VLSI Design and Test, VDAT 2013, held in Jaipur, India, in July 2013. The 44 papers presented were carefully reviewed and selected from 162 submissions. The papers discuss the frontiers of design and test of VLSI components, circuits and systems. They are organized in topical sections on VLSI design, testing and verification, embedded systems, emerging technology.

This book constitutes the refereed proceedings of the 38th Conference on Current Trends in Theory and Practice of Computer Science, SOFSEM 2012, held in Špindlerův Mlýn, Czech Republic, in January 2012. The 43 revised papers presented in this volume were carefully reviewed and selected from 121 submissions. The book also contains 11 invited talks, 10 of which are in full-paper length. The contributions are organized in topical sections named: foundations of computer science; software and Web engineering; cryptography, security, and verification; and artificial intelligence.

This book constitutes the refereed proceedings of the 7th International Workshop on OpenMP, IWOMP 2011, held in Chicago, IL, USA in June 2011. The 13 revised full papers presented were carefully reviewed and selected for inclusion in the proceedings. The papers are organized in topical sections on using OpenMP with application, tools for OpenMP, extensions of OpenMP, and implementation and performance.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This 4th issue contains 21 papers carefully reviewed and selected out of numerous submissions and is divided in four sections. The first section contains five regular papers. The second section consists of the top four papers from the 4th International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The third section contains a set of six papers providing a snap-shot from the Workshop on Software and Hardware Challenges of Manycore Platforms, SHCMP 2008 held in Beijing, China, in June 2008. The fourth section consists of six papers from the 8th IEEE International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS VIII (2008) held in Samos, Greece, in July 2008.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This third issue contains 14 papers carefully reviewed and selected out of numerous submissions and is divided into four sections. The first section contains the top four papers from the Third International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, in January 2008. The second section consists of four papers from the 8th MEDEA Workshop held in conjunction with PACT 2007 in Brasov, Romania, in September 2007. The third section contains two regular papers and the fourth section provides a snapshot from the First Workshop on Programmability Issues for Multicore Computers, MULTIPROG, held in conjunction with HiPEAC 2008.

This volume contains the papers presented at ESA 2009: The 17th Annual - ropean Symposium on Algorithms, September 7–9, 2009. ESA has been held annually since 1993, and seeks to cover both theoretical and engineering aspects of algorithms. The authors were asked to classify their paper under one or more categories as described in Fig. 1. Since 2001, ESA has been the core of the larger ALGO conference, which typically includes several satellite conferences. ALGO 2009 was held at the IT University of Copenhagen, Denmark. The?ve members of the ALGO 2009 - ganizing Committee were chaired by Thore Husfeldt. The ESA submission deadline was April 12, Easter Sunday. This was clearly an error and we o?er profuse apologies for this mistake. Albeit no excuse, the hard constraints we faced were (a) ICALP noti?cation, April 6, and (b) ESA in Copenhagen, September 7. Between these two endpoints we needed to design a schedule that allowed modifying ICALP rejections for resubmission (1 week), Program Committee deliberations (7 weeks), preparing?nal versions (4 weeks), and, to prepare, publish, and transport the proceedings (9 weeks). ESA 2009had 272submissions ofwhich 14 werewithdrawn overtime. Of the remaining 222 submissions to Track A (Design and Analysis), 56 were accepted. Of the remaining 36 submissions to Track B (Engineering and Applications), 10 were accepted. This gives an acceptance rate of slightly under 25%.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This second issue contains 15 papers carefully reviewed and selected out of 31 submissions and is divided into two sections. The first section contains extended versions of the top five papers from the 2nd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2007) held in Ghent, Belgium, in January 2007. The second section consists of ten papers covering topics such as microarchitecture, memory systems, code generation, and performance modeling.

This book constitutes the refereed proceedings of the 9th International Workshop on Architectures, Modeling, and Simulation, SAMOS 2009, held on Samos, Greece, on July 20-23, 2009. The 18 regular papers presented were carefully reviewed and selected from 52 submissions. The papers are organized in topical sections on architectures for multimedia, multi/many cores architectures, VLSI architectures design, architecture modeling and exploration tools. In addition there are 14 papers from three special sessions which were organized on topics of current interest: instruction-set customization, reconfigurable computing and processor architectures, and mastering cell BE and GPU execution platforms.

This book constitutes the refereed proceedings of the Fourth International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The 27 revised full papers presented together with 2 invited keynote paper were carefully reviewed and selected from 97 submissions. The papers are organized in topical sections on dynamic translation and optimisation, low level scheduling, parallelism and resource control, communication, mapping for CMPs, power, cache issues as well as parallel embedded applications.

This book constitutes the refereed proceedings of the 8th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2008, held in Samos, Greece, in July 2008. The 24 revised full papers presented together with a contamplative keynote and additional papers of two special workshop sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on architecture, new frontiers, SoC, application specific contributions, system level design for heterogeneous systems, programming multicores, sensors and sensor networks; and systems modeling and design.

On behalf of the program and organizing committee members of this conference, we th are pleased to present you with the proceedings of the 12 Asia-Pacific Computer Systems Architecture Conference (ACSAC 2007), which was hosted in Seoul, Korea on August 23-25, 2007. This conference has traditionally been a forum for leading researchers in the Asian, American and Oceanian regions to share recent progress and the latest results in both architectural and system issues. In the past few years the c- ference has become more international in the sense that the geographic origin of p- ticipants has become broader to include researchers from all around the world, incl- ing Europe and the Middle East. This year, we received 92 paper submissions. Each submission was reviewed by at least three primary reviewers along with up to three secondary reviewers. The total number of completed reviews reached 333, giving each submission 3.6 reviews on average. All the reviews were carefully examined during the paper selection process, and finally 26 papers were accepted, resulting in an acceptance rate of about 28%. The selected papers encompass a wide range of topics, with much emphasis on hardware and software techniques for state-of-the-art multicore and multithreaded architectures.

The three-volume set LNCS 14801, 14802, and 14803 constitutes the proceedings of the 30th European Conference on Parallel and Distributed Processing, Euro-Par 2024, which took place in Madrid, Spain, during August 26–30, 2024. The 88 full papers included in the proceedings were carefully reviewed and selected from 293 submissions. They were organized in topical sections as follows: Part I: Programming, compilers, and performance; scheduling, resource management, cloud, edge computing, and workflows; Part II: Architectures and accelerators; data analytics, AI and computational science; Part III: Theory and algorithms; multidisciplinary, domain-specific and applied parallel and distributed computing.

The three-volume set LNCS 14801, 14802, and 14803 constitutes the proceedings of the 30th European Conference on Parallel and Distributed Processing, Euro-Par 2024, which took place in Madrid, Spain, during August 26–30, 2024. The 88 full papers included in the proceedings were carefully reviewed and selected from 293 submissions. They were organized in topical sections as follows: Part I: Programmind, compilers, and performance; scheduling, resource management, cloud, edge computing, and workflows; Part II: Architectures and accelerators; data analytics, AI and computational science; Part III: Theory and algorithms; multidisciplinary, domain-specific and applied parallel and distributed computing.

The three-volume set LNCS 14801, 14802, and 14803 constitutes the proceedings of the 30th European Conference on Parallel and Distributed Processing, Euro-Par 2024, which took place in Madrid, Spain, during August 26–30, 2024. The 88 full papers included in the proceedings were carefully reviewed and selected from 293 submissions. They were organized in topical sections as follows: Part I: Programming, compilers, and performance; scheduling, resource management, cloud, edge computing, and workflows; Part II: Architectures and accelerators; data analytics, AI and computational science; Part III: Theory and algorithms; multidisciplinary, domain-specific and applied parallel and distributed computing.

This book constitutes the refereed proceedings of the 6th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2006, held in Samos, Greece on July 2006. The 47 revised full papers presented together with 2 keynote talks were thoroughly reviewed and selected from 130 submissions. The papers are organized in topical sections on system design and modeling, wireless sensor networks, processor design, dependable computing, architectures and implementations, and embedded sensor systems.

This book constitutes the proceedings of the 29th International Conference on Parallel and Distributed Computing, Euro-Par 2023, held in Limassol, Cyprus, in August/September 2023. The 49 full papers presented in this volume were carefully reviewed and selected from 164 submissions. They are covering the following topics: programming, compilers and performance; scheduling, resource management, cloud, edge computing, and workflows; architectures and accelerators; data analytics, AI, and computational science; theory and algorithms; multidisciplinary, and domain-specific and applied parallel and distributed computing.

This book constitutes the proceedings of the 33rd International Conference on Parallel and Distributed Computing, Euro-Par 2022, held in GLasgow, UK, in August 2022.The 25 full papers presented in this volume were carefully reviewed and selected from 102 submissions. The conference Euro-Par 2022 covers all aspects of parallel and distributed computing, ranging from theory to practice, scaling from the smallest to the largest parallel and distributed systems, from fundamental computational problems and models to full-fledged applications, from architecture and interface design and implementation to tools, infrastructures and applications.

This book gathers a collection of high-quality peer-reviewed research papers presented at First International Conference on Innovations in Software Architecture and Computational Systems (ISACS 2021), held at Guru Nanak Institute of Technology, Kolkata, India, during 2 – 3 April 2021. The book primarily focuses on developing artificial intelligence-based algorithms and methodologies for enabling intelligent hardware and software systems. This book brings together the latest findings on efficient technological solutions for developing intelligent and hybrid systems, intelligent software architecture, machine intelligence-based analytical tools and also smart sensors and networks. The prime focus is on solving technological problems using state-of-the-art research finding like fuzzy computing, evolutionary and hybrid frameworks, neuro-computing, etc., along with other AI-based computation platforms. The book offers a valuable resource for all undergraduate, postgraduate studentsand researchers interested in exploring solution frameworks for social good problems using artificial intelligence.

This workshop was a continuation of the PCRCW'94 workshop that focused on issues in parallel communication and routing in support of parallel processing. The workshop series provides a forum for researchers and designers to exchange ideas with respect to challenges and issues in supporting communication for high-performance parallel computing. Within the last few years we have seen the scope of interconnection network technology expand beyond traditional multiprocessor systems to include high-availability clusters and the emerging class of system area networks. New application domains are creating new requirements for interconnection network services, e.g., real-time video, on-line data mining, etc. The emergence of quality-of-service guarantees within these domains challenges existing approaches to interconnection network design. In the recent past we have seen the emphasis on low-latency software layers, the application of multicomputer interconnection technology to distributed shared-memory multiprocessors and LAN interconnects, and the shift toward the use of commodity clusters and standard components. There is a continuing evolution toward powerful and inexpensive network interfaces, and low-cost, high-speed routers and switches from commercial vendors. The goal is to address the above issues in the context of networks of workstations, multicomputers, distributed shared-memory multiprocessors, and traditional tightly-coupled multiprocessor interconnects. The PCRCW'97 workshop presented 20 regular papers and two short papers covering a range of topics dealing with modern interconnection networks. It was hosted by the Georgia Institute of Technology and sponsored by the Atlanta Chapter of the IEEE Computer Society.

This three-volume set, LNCS 12550, 12551, and 12552, constitutes the refereed proceedings of the 18th International Conference on Theory of Cryptography, TCCC 2020, held in Durham, NC, USA, in November 2020. The total of 71 full papers presented in this three-volume set was carefully reviewed and selected from 167 submissions. Amongst others they cover the following topics: study of known paradigms, approaches, and techniques, directed towards their better understanding and utilization; discovery of new paradigms, approaches and techniques that overcome limitations of the existing ones, formulation and treatment of new cryptographic problems; study of notions of security and relations among them; modeling and analysis of cryptographic algorithms; and study of the complexity assumptions used in cryptography. Due to the Corona pandemic this event was held virtually.

This book constitutes the proceedings of the 31st International Conference on Architecture of Computing Systems, ARCS 2018, held in Braunschweig, Germany, in April 2018.The 23 full papers presented in this volume were carefully reviewed and selected from 53 submissions. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from embedded and real-time systems all the way to large-scale and parallel systems.

This book constitutes the proceedings of the 12th International Symposium on Advanced Parallel Processing Technologies, APPT 2017, held in Santiago de Compostela, Spain, in August 2017.The 11 regular papers presented in this volume were carefully reviewed and selected from 18 submissions. They deal with the recent advances in big data processing; parallel architectures and systems; parallel software; parallel algorithms and artificial intelligence applications; and distributed and cloud computing.

Parallel computer architectures are now going to real applications! This fact is demonstrated by the large number of application areas covered in this book (see section on applications of parallel computer architectures). The applications range from image analysis to quantum mechanics and data bases. Still, the use of parallel architectures poses serious problems and requires the development of new techniques and tools. This book is a collection of best papers presented at the first workshop on two major research activities at the Universitiit Erlangen-Niirnberg and Technis­ che Universitiit Miinchen. At both universities, more than 100 researchers are working in the field of multiprocessor systems and network configurations and methods and tools for parallel systems. Indeed, the German Science Founda­ tion (Deutsche Forschungsgemeinschaft) has been sponsoring the projects under grant numbers SFB 182 and SFB 342. Research grants in the form of a Sonder­ forschungsbereich are given to selected German Universities in portions of three years following a thoroughful reviewing process. The overall duration of such a research grant is restricted to 12 years. The initiative at Erlangen-Niirnberg was started in 1987 and has been headed since this time by Prof. Dr. H. Wedekind. Work at TU-Miinchen began in 1990, head of this initiative is Prof. Dr. A. Bode. The authors of this book are grateful to the Deutsche Forschungsgemeinschaft for its continuing support in the field of research on parallel processing. The first section of the book is devoted to hardware aspects of parallel systems.

In the last decade of Computer Science development, we can observe a growing interest in fault-tolerant computing. This interest is the result of a rising number of appl'ications where reliable operation of computing systems is an essential requirement. Besides basic research in the field of fault-tolerant computing, there is an increasing num­ ber of systems especially designed to achieve fault-tolerance. It is the objective of this conference to offer a survey of present research and development activities in these areas. The second GI/NTG/GM~ Conference on Fault-Tolerant Computing Systems has had a preparatory time of about two years. In March 1982, the first GI conference concerning fault-tolerant computing systems was held in Munich. One of the results of the conference was to bring an organiza­ tional framework to the FTC community in Germany. This led to the founding of the common interest group'Fault-Tolerant Computing Systems'of the Gesellschaft fur Informatik (GI), the Nachrichtentechnische Gesellschaft (NTG), and the Gesellschaft fur MeB- und Regelungstechnik (VDI/VDE-GMR) in November 1982. At that time, it was also decided to schedule a biannual conference on fault-tolerant computing systems. One of the goals of this second conference is to strengthen the relations with the international FTC community; thus, the call for papers was extended not only to German-speaking countries, but to other countries as well.

This book constitutes the refereed proceedings of the 37th Conference on Current Trends in Theory and Practice of Computer Science, SOFSEM 2011, held in Nový, Smokovec, Slovakia in January 2011. The 41 revised full papers, presented together with 5 invited contributions, were carefully reviewed and selected from 122 submissions. SOFSEM 2011 was organized around the following four tracks: foundations of computer science; software, systems, and services; processing large datasets; and cryptography, security, and trust.

This book contains extended and revised versions of the best papers that were presented during the fourteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference. The 14th conference was held at the Hotel Boscolo, Nice, France (October 16-18, 2006). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier, Darmstadt and Perth. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5 and by the IEEE Council on Electronic Design Automation (CEDA), is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI- SOC conferences aim to address these exciting new issues.

Active Objects are a programming paradigm that supports a non-competitive, data-driven concurrency model. This renders active object languages to be well-suited for simulation, data race-free programming, and formal verification. Concepts from active objects made their way into languages such as Rust, ABS, Akka, JavaScript, and Go. This is the first comprehensive state-of-art overview on the subject, the invited contributions are written by experts in the areas of distributed systems, formal methods, and programming languages.

This textbook covers the new development in processor architecture and parallel hardware. It provides detailed descriptions of parallel programming techniques that are necessary for developing efficient programs for multicore processors as well as for parallel cluster systems and supercomputers. The book is structured in three main parts, covering all areas of parallel computing: the architecture of parallel systems, parallel programming models and environments, and the implementation of efficient application algorithms. The emphasis lies on parallel programming techniques needed for different architectures. In particular, this third edition includes an extended update of the chapter on computer architecture and performance analysis taking new developments such as the aspect of energy consumption into consideration. The description of OpenMP has been extended and now also captures the task concept of OpenMP. The chapter on message-passing programming has been extended and updated to include new features of MPI such as extended reduction operations and non-blocking collective communication operations. The chapter on GPU programming also has been updated. All other chapters also have been revised carefully. The main goal of this book is to present parallel programming techniques that can be used in many situations for many application areas and to enable the reader to develop correct and efficient parallel programs. Many example programs and exercises are provided to support this goal and to show how the techniques can be applied to further applications. The book can be used as a textbook for students as well as a reference book for professionals. The material of the book has been used for courses in parallel programming at different universities for many years.

Open Radio Access Network (O-RAN) Systems Architecture and Design gives a jump-start to engineers developing O-RAN hardware and software systems, providing a top-down approach to O-RAN systems design. It gives an introduction into why wireless systems look the way they do today before introducing relevant O-RAN and 3GPP standards. The remainder of the book discusses hardware and software aspects of O-RAN system design, including dimensioning and performance targets. Presents O-RAN and 3GPP standards Provides a top-down approach to O-RAN systems design Includes practical examples of relevant elements of detailed hardware and software design to provide tools for development Gives a few practical examples of where O-RAN designs play in the market and how they map to hardware and software architectures