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This book constitutes the proceedings of the 5th OpenSHMEM Workshop, held in Baltimore, MD, USA, in August 2018. The 14 full papers presented in this book were carefully reviewed and selected for inclusion in this volume. The papers discuss a variety of ideas for extending the OpenSHMEM specification and discuss a variety of concepts, including interesting use of OpenSHMEM in HOOVER – a distributed, flexible, and scalable streaming graph processor and scaling OpenSHMEM to handle massively parallel processor arrays. The papers are organized in the following topical sections: OpenSHMEM library extensions and implementations; OpenSHMEM use and applications; and OpenSHMEM simulators, tools, and benchmarks.

This book constitutes the proceedings of the 30th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2017, held in College Station, TX, USA, in October 2017. The 17 full papers presented together with abstracts of 5 keynote talks, 11 invited speakers and 4 poster papers in this volume were carefully reviewed and selected from 26 submissions. LCPC encourages submissions that go outside its original scope of scientific computing to diverse areas that are enable or enhanced by the power of parallel systems such as mobile computing, big data, relevant aspects of machine learning, data centers, cognitive computing, etc. LCPC strongly encourages personal interaction and technical discussions along the initial material.

This book constitutes the thoroughly refereed revised selected papers of the 19th International Symposium on Trends in Functional Programming, TFP 2018, held in Gothenburg, Sweden, in June 2018. The 7 revised full papers were selected from 13 submissions and present papers in all aspects of functional programming, taking a broad view of current and future trends in the area. It aspires to be a lively environment for presenting the latest research results, and other contributions, described in draft papers submitted prior to the symposium.

This book constitutes the refereed proceedings of the 13th International Conference on Parallel Computational Technologies, PCT 2019, held in Kaliningrad, Russia, in April 2019.The 24 revised full papers presented were carefully reviewed and selected from 96 submissions. The papers are organized in topical sections on high performance architectures, tools and technologies; parallel numerical algorithms; supercomputer simulation.

This book constitutes the thoroughly refereed post-conference proceedings of the 21st International Workshop on Job Scheduling Strategies for Parallel Processing, JSSPP 2017, held in Orlando, FL, USA, in June 2017.The 10 revised full papers presented in this book were carefully reviewed and selected from 20 submissions. The papers cover topics in the fields of design and evaluation of new scheduling approaches; performance evaluation of scheduling approaches; workloads; consideration of additional constraints in scheduling systems; scaling and composition of very large scheduling systems; cloud provider issues; interaction between schedulers on different levels; interaction between applications/workloads; experience reports from production systems or large scale compute campaigns.

This book constitutes the proceedings of the 4th OpenSHMEM Workshop, held in Annapolis, MD, USA, in August 2017.The 11 full papers presented in this book were carefully reviewed and selected from 14 submissions. The papers discuss a variety of ideas for extending the OpenSHMEM specification and making it efficient for current and next generation systems. This includes new research for communication contexts in OpenSHMEM, different optimizations for OpenSHMEM on shared memory machines, exploring the implementation of OpenSHMEM and its memory model on Intel's KNL architecture, and implementing new applications and benchmarks with OpenSHMEM.

This book constitutes the refereed proceedings of the 12th International Conference on Parallel Computational Technologies, PCT 2018, held in Rostov-on-Don, Russia, in April 2018.The 24 revised full papers presented were carefully reviewed and selected from 167 submissions. The papers are organized in topical sections on high performance architectures, tools and technologies; parallel numerical algorithms; supercomputer simulation.

This book constitutes the refereed post-conference proceedings of 9 workshops held at the 35th International ISC High Performance 2021 Conference, in Frankfurt, Germany, in June-July 2021:Second International Workshop on the Application of Machine Learning Techniques to Computational Fluid Dynamics and Solid Mechanics Simulations and Analysis; HPC-IODC: HPC I/O in the Data Center Workshop; Compiler-assisted Correctness Checking and Performance Optimization for HPC; Machine Learning on HPC Systems;4th International Workshop on Interoperability of Supercomputing and Cloud Technologies;2nd International Workshop on Monitoring and Operational Data Analytics;16th Workshop on Virtualization in High­-Performance Cloud Computing; Deep Learning on Supercomputers; 5th International Workshop on In Situ Visualization. The 35 papers included in this volume were carefully reviewed and selected. They cover all aspects of research, development, and application of large-scale,high performance experimental and commercial systems. Topics include high-performance computing (HPC), computer architecture and hardware, programming models, system software, performance analysis and modeling, compiler analysis and optimization techniques, software sustainability, scientific applications, deep learning.Chapter “Machine-Learning-Based Control of Perturbed and Heated Channel Flows” is available open access under a Creative Commons Attribution 4.0 International License via link.springer.com.

This book constitutes the refereed proceedings of the 22nd CCF Conference on Computer Engineering and Technology, NCCET 2018, held in Yinchuan, China, in August 2018.The 17 full papers presented were carefully reviewed and selected from 120 submissions. They address topics such as processor architecture; application specific processors; computer application and software optimization; technology on the horizon.

This book constitutes the proceedings of the workshops of the 23rd International Conference on Parallel and Distributed Computing, Euro-Par 2017, held in Santiago de Compostela. Spain in August 2017. The 59 full papers presented were carefully reviewed and selected from 119 submissions.Euro-Par is an annual, international conference in Europe, covering all aspects of parallel and distributed processing. These range from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-edged applications, from architecture, compiler, language and interface design and implementation to tools, support infrastructures, and application performance aspects.

This book constitutes the refereed proceedings of the 18th National Conference on Computer Engineering and Technology, NCCET 2014, held in Guiyang, China, during July/August 2014. The 18 papers presented were carefully reviewed and selected from 85 submissions. They are organized in topical sections on processor architecture; computer application and software optimization; technology on the horizon.

This book constitutes the refereed proceedings of the 17th National Conference on Computer Engineering and Technology, NCCET 2013, held in Xining, China, in July 2013. The 26 papers presented were carefully reviewed and selected from 234 submissions. They are organized in topical sections named: Application Specific Processors; Communication Architecture; Computer Application and Software Optimization; IC Design and Test; Processor Architecture; Technology on the Horizon.

This book constitutes the thoroughly refereed post-workshop proceedings of the 13th International Workshop on Job Scheduling Strategies for Parallel Processing, JSSPP 2007, held in Seattle, WA, USA, in June 2007, in conjunction with the 21st ACM International Conference on Supercomputing, ICS 2007. The 10 revised full research papers presented went through the process of strict reviewing and subsequent improvement. The papers cover all current issues of job scheduling strategies for parallel processing from the supercomputer-centric viewpoint but also address many nontraditional high-performance computing and parallel environments that cannot or need not access a traditional supercomputer, such as grids, Web services, and commodity parallel computers. The papers are organized in topical sections on performance and tools, queueing systems, as well as grid and heterogeneous architectures.

This book constitutes the thoroughly refereed post-proceedings of the 12th International Workshop on Job Scheduling Strategies for Parallel Processing, JSSPP 2006, held in Saint-Malo, France in June 2006 in conjunction with the Joint International Conference on Measurement and Modeling of Computer Systems SIGMETRICS/Performance 2006. The 12 revised full research papers cover all current issues of job scheduling strategies for parallel processing.

This book constitutes the proceedings of the 17th International Workshop on OpenMP, IWOMP 2021, held virtually in September 2021 and hosted by the High Performance Computing research group at the University of Bristol, UK.The 15 full papers presented in this volume were carefully reviewed and selected for inclusion in this book. The papers are organized in topical sections named: synchronization and data; tasking expansions; applications; case studies; and heterogenous computing and memory. Chapter ‘FOTV: A Generic Device Offloading Framework for OpenMP'is available open access under a Creative Commons Attribution 4.0 International License via link.springer.com.

This book constitutes the refereed proceedings of the 36th International Conference on High Performance Computing, ISC High Performance 2021, held virtually in June/July 2021.The 24 full papers presented were carefully reviewed and selected from 74 submissions. The papers cover a broad range of topics such as architecture, networks, and storage; machine learning, AI, and emerging technologies; HPC algorithms and applications; performance modeling, evaluation, and analysis; and programming environments and systems software.

This book constitutes the proceedings of the 16th International Workshop on OpenMP, IWOMP 2020, held in Austin, TX, USA, in September 2020. The conference was held virtually due to the COVID-19 pandemic. The 21 full papers presented in this volume were carefully reviewed and selected for inclusion in this book. The papers are organized in topical sections named: performance methodologies; applications; OpenMP extensions; performance studies; tools; NUMA; compilation techniques; heterogeneous computing; and memory.The chapters ‘A Case Study on Addressing Complex Load Imbalance in OpenMP'and ‘A Study of Memory Anomalies in OpenMP Applications'are available open access under a Creative Commons Attribution 4.0 License via link.springer.com.

This book constitutes the proceedings of the 15th International Workshop on Open MP, IWOMP 2019, held in Auckland, New Zealand, in September 2019. The 22 full papers presented in this volume were carefully reviewed and selected for inclusion in this book. The papers are organized in topical sections named: best paper; tools, accelerators, compilation, extensions, tasking, and using OpenMP.

This book constitutes the refereed proceedings of the 34th International Conference on High Performance Computing, ISC High Performance 2019, held in Frankfurt/Main, Germany, in June 2019.The 17 revised full papers presented were carefully reviewed and selected from 70 submissions. The papers cover a broad range of topics such as next-generation high performance components; exascale systems; extreme-scale applications; HPC and advanced environmental engineering projects; parallel ray tracing - visualization at its best; blockchain technology and cryptocurrency; parallel processing in life science; quantum computers/computing; what's new with cloud computing for HPC; parallel programming models for extreme-scale computing; workflow management; machine learning and big data analytics; and deep learning and HPC.

This book constitutes the proceedings of the 32nd International Conference on Architecture of Computing Systems, ARCS 2019, held in Copenhagen, Denmark, in May 2019. The 24 full papers presented in this volume were carefully reviewed and selected from 40 submissions. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from embedded and real-time systems all the way to large-scale and parallel systems. The selected papers are organized in the following topical sections: Dependable systems; real-time systems; special applications; architecture; memory hierarchy; FPGA; energy awareness; NoC/SoC. The chapter'MEMPower: Data-Aware GPU Memory Power Model'is open access under a CC BY 4.0 license at link.springer.com.

This book constitutes the refereed proceedings of the 12th Annual Conference on Advanced Computer Architecture, ACA 2018, held in Yingkou, China, in August 2018. The 17 revised full papers presented were carefully reviewed and selected from 80 submissions. The papers of this volume are organized in topical sections on: accelerators; new design explorations; towards efficient ML/AI; parallel computing system.

This book constitutes the refereed proceedings of the 33rd International Conference, ISC High Performance 2018, held in Frankfurt, Germany, in June 2018. The 20 revised full papers presented in this book were carefully reviewed and selected from 81 submissions. The papers cover the following topics: Resource Management and Energy Efficiency; Performance Analysis and Tools; Exascale Networks; Parallel Algorithms.

This book constitutes the proceedings of the 14th International Workshop on Open MP, IWOMP 2018, held in Barcelona, Spain, in September 2018.The 16 full papers presented in this volume were carefully reviewed and selected for inclusion in this book. The papers are organized in topical sections named: best paper; loops and OpenMP; OpenMP in heterogeneous systems; OpenMP improvements and innovations; OpenMP user experiences: applications and tools; and tasking evaluations.

The two volumes LNCS 10199 and 10200 constitute the refereed conference proceedings of the 20th European Conference on the Applications of Evolutionary Computation, EvoApplications 2017, held in Amsterdam, The Netherlands, in April 2017, collocated with the Evo• 2016 events EuroGP, EvoCOP, and EvoMUSART. The 46 revised full papers presented together with 26 poster papers were carefully reviewed and selected from 108 submissions. EvoApplications 2016 consisted of the following 13 tracks: EvoBAFIN (natural computing methods in business analytics and finance), EvoBIO (evolutionary computation, machine learning and data mining in computational biology), EvoCOMNET (nature-inspired techniques for telecommunication networks and other parallel and distributed systems), EvoCOMPLEX (evolutionary algorithms and complex systems), EvoENERGY (evolutionary computation in energy applications), EvoGAMES (bio-inspired algorithms in games), EvoIASP (evolutionary computation in image analysis, signal processing, and pattern recognition), EvoINDUSTRY (nature-inspired techniques in industrial settings), EvoKNOW (knowledge incorporation in evolutionary computation), EvoNUM (bio-inspired algorithms for continuous parameter optimization), EvoPAR (parallel implementation of evolutionary algorithms), EvoROBOT (evolutionary robotics), EvoSET (nature-inspired algorithms in software engineering and testing), and EvoSTOC (evolutionary algorithms in stochastic and dynamic environments).

The two volumes LNCS 10199 and 10200 constitute the refereed conference proceedings of the 20th European Conference on the Applications of Evolutionary Computation, EvoApplications 2017, held in Amsterdam, The Netherlands, in April 2017, colocated with the Evo• 2016 events EuroGP, EvoCOP, and EvoMUSART. The 46 revised full papers presented together with 26 poster papers were carefully reviewed and selected from 108 submissions. EvoApplications 2016 consisted of the following 13 tracks: EvoBAFIN (natural computing methods in business analytics and finance), EvoBIO (evolutionary computation, machine learning and data mining in computational biology), EvoCOMNET (nature-inspired techniques for telecommunication networks and other parallel and distributed systems), EvoCOMPLEX (evolutionary algorithms and complex systems), EvoENERGY (evolutionary computation in energy applications), EvoGAMES (bio-inspired algorithms in games), EvoIASP (evolutionary computation in image analysis, signal processing, and pattern recognition), EvoINDUSTRY (nature-inspired techniques in industrial settings), EvoKNOW (knowledge incorporation in evolutionary computation), EvoNUM (bio-inspired algorithms for continuous parameter optimization), EvoPAR (parallel implementation of evolutionary algorithms), EvoROBOT (evolutionary robotics), EvoSET (nature-inspired algorithms in software engineering and testing), and EvoSTOC (evolutionary algorithms in stochastic and dynamic environments).

This volume, the 34th issue of Transactions on Large-Scale Data- and Knowledge-Centered Systems, constitutes a special issue consisting of seven papers on the subject of Consistency and Inconsistency in Data-Centric Applications. The volume opens with an invited article on basic postulates for inconsistency measures. Three of the remaining six papers are revised, extended versions of papers presented at the First International Workshop on Consistency and Inconsistency, COIN 2016, held in conjunction with DEXA 2016 in Porto, Portugal, in September 2016. The other three papers were selected from submissions to a call for contributions to this edition. Each of the papers highlights a particular subtopic. However, all are concerned with logical inconsistencies that are either to be systematically avoided, or reasoned with consistently, i.e., without running the danger of an explosion of inferences.

This state-of-the-art survey features topics related to the impact of multicore, manycore, and coprocessor technologies in science and large-scale applications in an interdisciplinary environment. The papers included in this survey cover research in mathematical modeling, design of parallel algorithms, aspects of microprocessor architecture, parallel programming languages, hardware-aware computing, heterogeneous platforms, manycore technologies, performance tuning, and requirements for large-scale applications. The contributions presented in this volume are an outcome of an inspiring conference conceived and organized by the editors at the University of Applied Sciences (HfT) in Stuttgart, Germany, in September 2012. The 10 revised full papers selected from 21 submissions are presented together with the twelve poster abstracts and focus on combination of new aspects of microprocessor technologies, parallel applications, numerical simulation, and software development; thus they clearly show the potential of emerging technologies in the area of multicore and manycore processors that are paving the way towards personal supercomputing and very likely towards exascale computing.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This 4th issue contains 21 papers carefully reviewed and selected out of numerous submissions and is divided in four sections. The first section contains five regular papers. The second section consists of the top four papers from the 4th International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The third section contains a set of six papers providing a snap-shot from the Workshop on Software and Hardware Challenges of Manycore Platforms, SHCMP 2008 held in Beijing, China, in June 2008. The fourth section consists of six papers from the 8th IEEE International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS VIII (2008) held in Samos, Greece, in July 2008.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This third issue contains 14 papers carefully reviewed and selected out of numerous submissions and is divided into four sections. The first section contains the top four papers from the Third International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, in January 2008. The second section consists of four papers from the 8th MEDEA Workshop held in conjunction with PACT 2007 in Brasov, Romania, in September 2007. The third section contains two regular papers and the fourth section provides a snapshot from the First Workshop on Programmability Issues for Multicore Computers, MULTIPROG, held in conjunction with HiPEAC 2008.

This book constitutes the refereed proceedings of the Second International Conference on Advances in Power Electronics and Instrumentation Engineering, PEIE 2011, held at Nagpur, India, in April 2011. The 9 revised full papers presented together with 4 short papers and 7 poster papers were carefully reviewed and selected from numerous submissions. The papers address current issues in the field of power electronics, communication engineering, instrumentation engineering, digital electronics, electrical power engineering, electrical machines, information technology, control systems, and the like.

This book contains the best papers of the International Conference on Advances in Power Electronics and Instrumentation Engineering, PEIE 2010, organized by the Association of Computer Electronics and Electrical Engineers (ACEEE), during September 7–9, 2010 in Kochi, Kerala, India. PEIE is an international conference integrating two major areas of electrical en- neering – power electronics and instrumentation. Thus this conference reflects a c- tinuing effort to increase the dissemination of recent research results among prof- sionals who work in the areas of power electronics, instrumentation and electrical engineering The program of this joint conference included several outstanding keynote lectures presented by internationally renowned distinguished researchers who are experts in the various PEIE areas. Their keynote speeches have contributed to heightening the ov- all quality of the program and significance of the theme of the conference. I hope that you will find this collection of the best PEIE 2010 papers an excellent source of inspiration as well as a helpful reference for research in the aforementioned areas. Organizing a conference like this one is not possible without the assistance and continuous support of many people and institutions. I thank Stefan Goeller, Janahanlal Stephen, R Vijay Kumar, and Nessy Thankachan for their constant support and gu- ance. I would like to express my gratitude to Springer's LNCS-CCIS editorial team, especially Leonie Kunz, for producing such a wonderful proceedings book.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This second issue contains 15 papers carefully reviewed and selected out of 31 submissions and is divided into two sections. The first section contains extended versions of the top five papers from the 2nd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2007) held in Ghent, Belgium, in January 2007. The second section consists of ten papers covering topics such as microarchitecture, memory systems, code generation, and performance modeling.

This book constitutes the proceedings of the SPEC Benchmark Workshop 2009 held in Austin, Texas, USA on January 25th, 2009. The 9 papers presented were carefully selected and reviewed for inclusion in the book. The result is a collection of high-quality papers discussing current issues in the area of benchmarking research and technology. The topics covered are: benchmark suites, CPU benchmarking, power/thermal benchmarking, and modeling and sampling techniques.

This book constitutes the refereed proceedings of the Fourth International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The 27 revised full papers presented together with 2 invited keynote paper were carefully reviewed and selected from 97 submissions. The papers are organized in topical sections on dynamic translation and optimisation, low level scheduling, parallelism and resource control, communication, mapping for CMPs, power, cache issues as well as parallel embedded applications.

This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized into topical sections on a number of key subjects in the field.

On behalf of the program and organizing committee members of this conference, we th are pleased to present you with the proceedings of the 12 Asia-Pacific Computer Systems Architecture Conference (ACSAC 2007), which was hosted in Seoul, Korea on August 23-25, 2007. This conference has traditionally been a forum for leading researchers in the Asian, American and Oceanian regions to share recent progress and the latest results in both architectural and system issues. In the past few years the c- ference has become more international in the sense that the geographic origin of p- ticipants has become broader to include researchers from all around the world, incl- ing Europe and the Middle East. This year, we received 92 paper submissions. Each submission was reviewed by at least three primary reviewers along with up to three secondary reviewers. The total number of completed reviews reached 333, giving each submission 3.6 reviews on average. All the reviews were carefully examined during the paper selection process, and finally 26 papers were accepted, resulting in an acceptance rate of about 28%. The selected papers encompass a wide range of topics, with much emphasis on hardware and software techniques for state-of-the-art multicore and multithreaded architectures.

th Welcome to the proceedings of PATMOS 2007, the 17 in a series of international workshops. PATMOS 2007 was organized by Chalmers University of Technology with IEEE Sweden Chapter of the Solid-State Circuit Society technical - sponsorship and IEEE CEDA sponsorship. Over the years, PATMOS has evolved into an important European event, where - searchers from both industry and academia discuss and investigate the emerging ch- lenges in future and contemporary applications, design methodologies, and tools - quired for the development of the upcoming generations of integrated circuits and systems. The technical program of PATMOS 2007 consisted of state-of-the-art te- nical contributions, three invited talks and an industrial session on design challenges in real-life projects. The technical program focused on timing, performance and power consumption, as well as architectural aspects with particular emphasis on m- eling, design, characterization, analysis and optimization in the nanometer era. The Technical Program Committee, with the assistance of additional expert - viewers, selected the 55 papers presented at PATMOS. The papers were organized into 9 technical sessions and 3 poster sessions. As is always the case with the PATMOS workshops, full papers were required, and several reviews were received per manuscript.

Welcome to the proceedings of PATMOS 2006, the 16th in a series of international workshops. PATMOS 2006 was organized by LIRMM with CAS technical - sponsorship and CEDA sponsorship. Over the years, the PATMOS workshop has evolved into an important European event, where researchers from both industry and academia discuss and investigate the emerging challenges in future and contemporary applications, design methodologies, and tools required for the development of upcoming generations of integrated circuits and systems. The technical program of PATMOS 2006 contained state-of-the-art technical contributions, three invited talks, a special session on hearing-aid design, and an embedded tutorial. The technical program focused on timing, performance and power consumption, as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization in the nanometer era. The Technical Program Committee, with the assistance of additional expert reviewers, selected the 64 papers presented at PATMOS. The papers were organized into 11 technical sessions and 3 poster sessions. As is always the case with the PATMOS workshops, full papers were required, and several reviews were received per manuscript.

This textbook introduces readers to the fundamental hardware used in modern computers. The only pre-requisite is algebra, so it can be taken by college freshman or sophomore students or even used in Advanced Placement courses in high school. This book presents both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). This textbook enables readers to design digital systems using the modern HDL approach while ensuring they have a solid foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the content with learning goals and assessment at its core. Each section addresses a specific learning outcome that the learner should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure learner performance on each outcome. This book can be used for either a sequence of two courses consisting of an introduction to logic circuits (Chapters 1-7) followed by logic design (Chapters 8-14) or a single, accelerated course that uses the early chapters as reference material.

As Chairmen of HiPEAC 2005, we have the pleasure of welcoming you to the proceedings of the?rst international conference promoted by the HiPEAC N- work of Excellence. During the last year, HiPEAC has been building its clusters of researchers in computer architecture and advanced compiler techniques for embedded and high-performance computers. Recently, the Summer School has been the seed for a fruitful collaboration of renowned international faculty and young researchers from 23 countries with fresh new ideas. Now, the conference promises to be among the premier forums for discussion and debate on these research topics. Theprestigeofasymposiumismainlydeterminedbythequalityofitstech- cal program. This?rst programlived up to our high expectations, thanks to the largenumber of strong submissions. The ProgramCommittee received a total of 84 submissions; only 17 were selected for presentation as full-length papers and another one as an invited paper. Each paper was rigorously reviewed by three ProgramCommittee members and at least one external referee. Many reviewers spent a great amount of e?ort to provide detailed feedback. In many cases, such feedback along with constructive shepherding resulted in dramatic improvement in the quality of accepted papers. The names of the Program Committee m- bers and the referees are listed in the proceedings. The net result of this team e?ort is that the symposium proceedings include outstanding contributions by authors from nine countries in three continents. In addition to paper presentations, this?rst HiPEAC conference featured two keynotes delivered by prominent researchers from industry and academia.

This book contains the papers presented at the 9th International Workshop on Field ProgrammableLogic and Applications (FPL'99), hosted by the University of Strathclyde in Glasgow, Scotland, August 30 – September 1, 1999. FPL'99 is the ninth in the series of annual FPL workshops. The FPL'99 programme committee has been fortunate to have received a large number of high-quality papers addressing a wide range of topics. From these, 33 papers have been selected for presentation at the workshop and a further 32 papers have been accepted for the poster sessions. A total of 65 papers from 20 countries are included in this volume. FPL is a subject area that attracts researchers from both electronic engine- ing and computer science. Whether we are engaged in research into soft ha- ware or hard software seems to be primarily a question of perspective. What is unquestionable is that the interaction of groups of researchers from di?erent backgrounds results in stimulating and productive research. As we prepare for the new millennium, the premier European forum for - searchers in?eld programmable logic remains the FPL workshop. Next year the FPL series of workshopswill celebrate its tenth anniversary.The contribution of so many overseas researchers has been a particularly attractive feature of these events, giving them a truly international perspective, while the informal and convivial atmosphere that pervades the workshops have been their hallmark. We look forward to preserving these features in the future while continuing to expand the size and quality of the events.

This textbook is intended to give an introduction to and an overview of sta- of-the-art techniques in the design of complex embedded systems. The book title is SAMOS for two major reasons. First, it tries to focus on the actual distinct, yet important problem?elds of System-Level design of embedded systems, including mapping techniques and synthesis,Architectural design,Modeling issues such as speci?cation languages, formal models, and- nallySimulation. The second reason is that the volume includes a number of papers presented at a workshop with the same name on the Island of Samos, Greece, in July 2001. In order to receive international attention, a number of reputed researchers were invited to this workshop to present their current work. Participation was by invitation only. For the volume presented here, a number of additional papers where selected based on a call for papers. All contributions were refereed. This volume presents a selection of 18 of the refereed papers, including 2 invited papers. The textbook is organized according to four topics: The?rst isA)System- LevelDesignandSimulation.Inthissection,wepresentacollectionofpapers that give an overview of the challenging goal to design and explore alternatives of embedded system implementations at the system-level. One paper gives an overview of models and tools used in system-level design. The other papers present new models to describe applications, provide models for re?nement and design space exploration, and for tradeo? analysis between cost and?exibility of an implementation.

This book constitutes the proceedings of the 31st International Conference on Architecture of Computing Systems, ARCS 2018, held in Braunschweig, Germany, in April 2018.The 23 full papers presented in this volume were carefully reviewed and selected from 53 submissions. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from embedded and real-time systems all the way to large-scale and parallel systems.

This, the 39th issue of Transactions on Large-Scale Data- and Knowledge-Centered Systems, contains extended and revised versions of seven papers selected from the 37 contributions presented at the 28th International Conference on Database and Expert Systems Applications, DEXA 2017, held in Lyon, France, in August 2017. Topics covered include knowledge bases, clustering algorithms, parallel frequent itemset mining, model-driven engineering, virtual machines, recommendation systems, and federated SPARQL query processing.

This book constitutes the proceedings of the 14th International Conference on Bioinformatics Research and Applications, ISBRA 2018, held in Beijing, China, in June 2018.The 24 full and 10 short papers presented in this volume were carefully reviewed and selected from a total of 138 submissions. They were organized in topical sections named: network analysis and modelling; genomic data analysis; cancer data analysis; structure and interaction; HPC and CryoEM; machine and deep learning; data analysis and methodology; analysis and visualization tools; and RNA-Seq data analysis.

This textbook for courses in Digital Systems Design introduces students to the fundamental hardware used in modern computers. Coverage includes both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). Using this textbook enables readers to design digital systems using the modern HDL approach, but they have a broad foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning Goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.

This book constitutes the proceedings of the 13th International Workshop on OpenMP, IWOMP 2017, held in Stony Brook, NY, USA, in September 2017. The 23 full papers presented in this volume were carefully reviewed and selected from 28 submissions. They were organized in topical sections named: Advanced Implementations and Extensions; OpenMP Application Studies; Analyzing and Extending Tasking; OpenMP 4 Application Evaluation; Extended Parallelism Models: Performance Analysis and Tools; and Advanced Data Management with OpenMP.