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A subtle change that leads to disastrous consequences—hardware Trojans undoubtedly pose one of the greatest security threats to the modern age. How to protect hardware against these malicious modifications? One potential solution hides within logic locking; a prominent hardware obfuscation technique. In this book, we take a step-by-step approach to understanding logic locking, from its fundamental mechanics, over the implementation in software, down to an in-depth analysis of security properties in the age of machine learning. This book can be used as a reference for beginners and experts alike who wish to dive into the world of logic locking, thereby having a holistic view of the entire infrastructure required to design, evaluate, and deploy modern locking policies.

This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.

The book discusses the latest developments and outlines future trends in the fields of microelectronics, electromagnetics, and telecommunication. It contains original research works presented at the International Conference on Microelectronics, Electromagnetics and Telecommunication (ICMEET 2023), organized by Department of Electronics and Communication Engineering, National Institute of Technology Mizoram, India, during 6–7 October 2023. The book is divided into two volumes, and it covers papers written by scientists, research scholars, and practitioners from leading universities, engineering colleges, and R&D institutes from all over the world and shares the latest breakthroughs in and promising solutions to the most important issues facing today's society.

This book constitutes the proceedings of the 27th International Symposium on VLSI Design and Test, VDAT 2023. The 32 regular papers and 16 short papers presented in this book are carefully reviewed and selected from 220 submissions. They are organized in topical sections as follows: Low-Power Integrated Circuits and Devices; FPGA-Based Design and Embedded Systems; Memory, Computing, and Processor Design; CAD for VLSI; Emerging Integrated Circuits and Systems; VLSI Testing and Security; and System-Level Design.

Eine subtile Veränderung, die zu katastrophalen Folgen führt - Hardware-Trojaner stellen zweifellos eine der größten Sicherheitsbedrohungen des modernen Zeitalters dar. Wie kann die Hardware vor diesen bösartigen Veränderungen geschützt werden? Eine mögliche Lösung verbirgt sich im Logic Locking, einer bekannten Technik zur Verschleierung von Hardware. In diesem Buch gehen wir Schritt für Schritt vor, um Logic Locking zu verstehen, von seiner grundlegenden Mechanik über die Implementierung in Software bis hin zu einer eingehenden Analyse der Sicherheitseigenschaften im Zeitalter des maschinellen Lernens. Dieses Buch kann als Nachschlagewerk sowohl für Anfänger als auch für Experten verwendet werden, die in die Welt des logischen Sperrens eintauchen wollen und dabei einen ganzheitlichen Überblick über die gesamte Infrastruktur erhalten möchten, die für den Entwurf, die Bewertung und den Einsatz moderner Sperrstrategien erforderlich ist.

This book provides a look into the future of hardware and microelectronics security, with an emphasis on potential directions in security-aware design, security verification and validation, building trusted execution environments, and physical assurance. The book emphasizes some critical questions that must be answered in the domain of hardware and microelectronics security in the next 5-10 years: (i) The notion of security must be migrated from IP-level to system-level; (ii) What would be the future of IP and IC protection against emerging threats; (iii) How security solutions could be migrated/expanded from SoC-level to SiP-level; (iv) the advances in power side-channel analysis with emphasis on post-quantum cryptography algorithms; (v) how to enable digital twin for secure semiconductor lifecycle management; and (vi) how physical assurance will look like with considerations of emerging technologies. The main aim of this book is to serve as a comprehensive and concise roadmap for new learners and educators navigating the evolving research directions in the domain of hardware and microelectronic securities. Overall, throughout 11 chapters, the book provides numerous frameworks, countermeasures, security evaluations, and roadmaps for the future of hardware security.

This book demonstrates the breadth and depth of IP protection through logic locking, considering both attacker/adversary and defender/designer perspectives. The authors draw a semi-chronological picture of the evolution of logic locking during the last decade, gathering and describing all the DO's and DON'Ts in this approach. They describe simple-to-follow scenarios and guide readers to navigate/identify threat models and design/evaluation flow for further studies. Readers will gain a comprehensive understanding of all fundamentals of logic locking.

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science. Content includes invited chapters and a selection of the best papers presented at the 15th annual International Workshop on Boolean Problems.

Quality Electronic Design (QED)'s landscape spans a vast region where territories of many participating disciplines and technologies overlap. This book explores the latest trends in several key topics related to quality electronic design, with emphasis on Hardware Security, Cybersecurity, Machine Learning, and application of Artificial Intelligence (AI). The book includes topics in nonvolatile memories (NVM), Internet of Things (IoT), FPGA, and Neural Networks.

Globalization of the integrated circuit (IC) supply chains led to many potential vulnerabilities. Several attack scenarios can exploit these vulnerabilities to reverse engineer IC designs or to insert malicious trojan circuits. Split manufacturing refers to the process of splitting an IC design into multiple parts and fabricating these parts at two or more foundries such that the design is secure even when some or all of those foundries are potentially untrusted. Realizing its security benefits, researchers have proposed split fabrication methods for 2D, 2.5D, and the emerging 3D ICs. Both attack methods against split designs and defense techniques to thwart those attacks while minimizing overheads have steadily progressed over the past decade. This book presents a comprehensive review of the state-of-the-art and emerging directions in design splitting for secure split fabrication, design recognition and recovery attacks against split designs, and design techniquesto defend against those attacks. Readers will learn methodologies for secure and trusted IC design and fabrication using split design methods to protect against supply chain vulnerabilities.