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Dynamic frequency scaling (DFS) is a feature commonly found in modern processors. It lowers the clock frequency of a core according to the load level and reduces the power consumption. In this paper, we present a case study of tuning DFS parameters on a platform with an AMD Phenom II X6 using the SPECjEnterprise2010 (jEnt10) and SPECjbb2005 (jbb05) as the workload. In jEnt10, a longer sampling period of core utilization (up to 1.5s) reduced the power by 6Watt at 25% load level. At 50% load level, combining it with an increased threshold level (98%) to switch the clock frequency further reduced the power consumption by up to 10Watt. In jbb05, stretching the sampling period was only effective up to 0.5s. The maximum reduction was observed at around 60% load level. Raising the threshold level was not effective for jbb05. [ABSTRACT FROM AUTHOR]